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| Giovanni Agosta, Stefano Crespi Reghizzi, Gerlando Falauto, Martino Sykora, "JIST: Just-in-Time Scheduling Translation for Parallel Processors," Parallel and Distributed Computing, International Symposium on, pp. 122-132, Third International Symposium on Parallel and Distributed Computing/Third International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Networks (ISPDC/HeteroPar'04), 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/ISPDC.2004.32, author = {Giovanni Agosta and Stefano Crespi Reghizzi and Gerlando Falauto and Martino Sykora}, title = {JIST: Just-in-Time Scheduling Translation for Parallel Processors}, journal ={Parallel and Distributed Computing, International Symposium on}, volume = {0}, year = {2004}, isbn = {0-7695-2210-6}, pages = {122-132}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISPDC.2004.32}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Parallel and Distributed Computing, International Symposium on TI - JIST: Just-in-Time Scheduling Translation for Parallel Processors SN - 0-7695-2210-6 SP122 EP132 A1 - Giovanni Agosta, A1 - Stefano Crespi Reghizzi, A1 - Gerlando Falauto, A1 - Martino Sykora, PY - 2004 KW - null VL - 0 JA - Parallel and Distributed Computing, International Symposium on ER - | |||
The application fields of bytecode virtual machines and VLIW processors overlap in the area of embedded and mobile systems, where the two technologies offer different benefits, namely high code portability, low power consumption and reduced hardware cost. Dynamic compilation makes it possible to bridge the gap between the two technologies, but special attention must be paid to software instruction scheduling, a must for the VLIW architectures.
We have implemented JIST, a Virtual Machine and JIT compiler for Java Bytecode targeted to a VLIW processor. We show the impact of various optimizations on the performance of code compiled with JIST through the experimental study on a set of benchmark programs. We report significant speedups, and increments in the number of instructions issued per cycle up to 50% with respect to the non-scheduling version of the JIT compiler. Further optimizations are discussed.