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1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96)
Design and Implementation of a High Speed Parallel Architecture for ATM UNI
Beijing, CHINA
June 12-June 14
ISBN: 0-8186-7460-1
In this paper, a parallel architecture is proposed to support the operations described in the ITU-T Recommendation I.432 (B-ISDN user-network interface -- Physical layer specification). It is rather difficult to perform these operations on a bit serial architecture at a high rate. This paper demonstrates how these tasks can be achieved by means of parallelism. First, we describe the user-network interfaces in general and their physical layer properties. Then a parallel architecture is proposed with a general translation method which converts the serial operation into the parallel one. The application of the parallel architecture on each function is also depicted and the system has been realized in hardware using CMOS technology.
Index Terms:
ATM, UNI, Parallel architecture, VLSI
Citation:
Wen-Yu Tseng, Chin-Chou Chen, David S. L. Wei, Sy-Yen Kuo, "Design and Implementation of a High Speed Parallel Architecture for ATM UNI," ispan, pp.288, 1996 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '96), 1996
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