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34th International Symposium on Multiple-Valued Logic (ISMVL'04)
A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices
University of Toronto, Toronto, Canada
May 19-May 22
ISBN: 0-7695-2130-4
| ASCII Text | x | ||
| Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu, "A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices," Multiple-Valued Logic, IEEE International Symposium on, pp. 340-345, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/ISMVL.2004.1319965, author = {Hiromitsu Kimura and Kostas Pagiamtzis and Ali Sheikholeslami and Takahiro Hanyu}, title = {A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices}, journal ={Multiple-Valued Logic, IEEE International Symposium on}, volume = {0}, year = {2004}, issn = {0195-623X}, pages = {340-345}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISMVL.2004.1319965}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Multiple-Valued Logic, IEEE International Symposium on TI - A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices SN - 0195-623X SP340 EP345 A1 - Hiromitsu Kimura, A1 - Kostas Pagiamtzis, A1 - Ali Sheikholeslami, A1 - Takahiro Hanyu, PY - 2004 KW - null VL - 0 JA - Multiple-Valued Logic, IEEE International Symposium on ER - | |||
This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.
Citation:
Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu, "A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices," ismvl, pp.340-345, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004
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