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2013 IEEE 43rd International Symposium on Multiple-Valued Logic (1998)
Fukuoka, Japan
May 27, 1998 to May 29, 1998
ISBN: 0-8186-8371-6
TABLE OF CONTENTS
pp. xiii
Referees (PDF)
pp. xvi
Session I: Invited Address
Session IIa: Devices
Session IIb: Cellular Array and Fault Tolerance
Session IIIa: Decision Diagrams
Session IIIb: Algebra 1
Session IVa: Logic Design 1
Session IVb: Logic
Session V: Invited Address
The FPGA Challenge (Abstract)
pp. 121
Session VIa: VLSI Circuits 1
Session VIb: Applications of Multiple-Valued Logic
Session VIIa: Logic Design 2
Session VIIb: Genetic Algorithms in MVL
Session VIII: Invited Address
Session IXa: Minimization
Session IXb: Algebra 2
Session Xa: VLSI Circuits 2
Session Xb: Theory of Fuzzy Logic
Session XI: Invited Address
Session XII: Invited Address
Session XIII: Invited Address
Session XIVa: Applications of Fuzzy Logic
Session XIVb: Clone Theory
pp. 383
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