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  • 27th International Symposium on Multiple-Valued Logic (ISMVL '97)
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27th International Symposium on Multiple-Valued Logic (ISMVL '97)
Antigonish, Nova Scotia, CANADA
May 28-May 30
ISBN: 0-8186-7910-7
Table of Contents
Session 1: Invited Address
D. Rooss, Lehrstuhl fur Theor. Inf., Wurzburg Univ., Germany
pp. 3
Session 2A: Decomposition I
M. Perkowski, Dept. of Electr. Eng., Portland State Univ., OR, USA
M. Marek-Sadowska, Dept. of Electr. Eng., Portland State Univ., OR, USA
L. Jozwiak, Dept. of Electr. Eng., Portland State Univ., OR, USA
T. Luba, Dept. of Electr. Eng., Portland State Univ., OR, USA
S. Grygiel, Dept. of Electr. Eng., Portland State Univ., OR, USA
M. Nowicka, Dept. of Electr. Eng., Portland State Univ., OR, USA
R. Malvi, Dept. of Electr. Eng., Portland State Univ., OR, USA
Z. Wang, Dept. of Electr. Eng., Portland State Univ., OR, USA
J.S. Zhang, Dept. of Electr. Eng., Portland State Univ., OR, USA
pp. 13
E.V. Dubrova, VLSI Design & Test Group, Victoria Univ., BC, Canada
J.C. Muzio, VLSI Design & Test Group, Victoria Univ., BC, Canada
B. von Stengel, VLSI Design & Test Group, Victoria Univ., BC, Canada
pp. 19
C. Files, Dept. of Electr. Eng., Portland State Univ., OR, USA
R. Drechsler, Dept. of Electr. Eng., Portland State Univ., OR, USA
M.A. Perkowski, Dept. of Electr. Eng., Portland State Univ., OR, USA
pp. 27
Session 2B: Technology
Toshio Baba, Fundamental Research Laboratories, NEC Corporation
Tetsuya Uemura, Fundamental Research Laboratories, NEC Corporation
pp. 41
Session 3A: Minimization I
T. Sasao, Dept. of Comput. Sci., Kyushu Inst. of Technol., Iizuka, Japan
J.T. Butler, Dept. of Comput. Sci., Kyushu Inst. of Technol., Iizuka, Japan
pp. 55
Session 3B: Algebra
A. Ngom, Dept. of Comput. Sci., Ottawa Univ., Ont., Canada
C. Reischer, Dept. of Comput. Sci., Ottawa Univ., Ont., Canada
D.A. Simovici, Dept. of Comput. Sci., Ottawa Univ., Ont., Canada
I. Stojmenovic, Dept. of Comput. Sci., Ottawa Univ., Ont., Canada
pp. 75
N. Takagi, Dept. of Electron. & Inf., Toyama Prefectural Univ., Toyama, Japan
Y. Nakamura, Dept. of Electron. & Inf., Toyama Prefectural Univ., Toyama, Japan
K. Nakashima, Dept. of Electron. & Inf., Toyama Prefectural Univ., Toyama, Japan
pp. 89
Session 4A: Minimization II
Yutaka Hata, Himeji Institute of Technology
Kiyoshi Hayase, Himeji Institute of Technology
Takahiro Hozumi, Himeji Institute of Technology
Naotake Kamiura, Himeji Institute of Technology
Kazuharu Yamato, Himeji Institute of Technology
pp. 97
Yutaka Hata, Himeji Institute of Technology
Naotake Kamiura, Himeji Institute of Technology
Kazuharu Yamato, Himeji Institute of Technology
pp. 103
Session 4B: Philosophical Aspects
Jean-Yves Béziau, National Laboratory for Scientific Computing
pp. 117
Session 5A: Spectral Techniques
S. Rahardja, Centre for Signal Process., Nanyang Technol. Univ., Singapore
B.J. Falkowski, Centre for Signal Process., Nanyang Technol. Univ., Singapore
pp. 125
B.J. Falkowski, Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
S. Rahardja, Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
pp. 131
Session 5B: Testing and Fault Simulation
R. Drechsler, Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany
M. Keim, Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany
B. Becker, Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany
pp. 145
Session 6: Invited Address
Session 7A: Circuit Applications
T. Utsumi, Mitsubishi Electr. Corp., Tokyo, Japan
N. Kamiura, Mitsubishi Electr. Corp., Tokyo, Japan
Y. Hata, Mitsubishi Electr. Corp., Tokyo, Japan
K. Yamato, Mitsubishi Electr. Corp., Tokyo, Japan
pp. 163
T. Hanyu, Dept. of Comput. & Math. Sci., Tohoku Univ., Sendai, Japan
M. Arakaki, Dept. of Comput. & Math. Sci., Tohoku Univ., Sendai, Japan
M. Kameyama, Dept. of Comput. & Math. Sci., Tohoku Univ., Sendai, Japan
pp. 175
Session 7 B : Fuzzy Logic
J. Chen, Sch. of Inf. Technol. & Eng., George Mason Univ., Fairfax, VA, USA
D.C. Rine, Sch. of Inf. Technol. & Eng., George Mason Univ., Fairfax, VA, USA
pp. 189
Session 8A: Circuits
Session 8 B : Applications
Z. Tang, Fac. of Eng., Miyazaki Univ., Japan
T. Yamaguchi, Fac. of Eng., Miyazaki Univ., Japan
K. Tashima, Fac. of Eng., Miyazaki Univ., Japan
O. Ishizuka, Fac. of Eng., Miyazaki Univ., Japan
K. Tanno, Fac. of Eng., Miyazaki Univ., Japan
pp. 233
Session 9 : Invited Address
Session 10A: Logic Design
M. Abd-El-Barr, Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
M. Hasan, Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
G.A. Hamid, Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
pp. 253
Session 10B: Function Representation
S. Grygiel, Dept. of Electr. Eng., Portland State Univ., OR, USA
M. Perkowski, Dept. of Electr. Eng., Portland State Univ., OR, USA
M. Marek-Sadowska, Dept. of Electr. Eng., Portland State Univ., OR, USA
T. Luba, Dept. of Electr. Eng., Portland State Univ., OR, USA
L. Jozwiak, Dept. of Electr. Eng., Portland State Univ., OR, USA
pp. 287
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