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Proceedings. 33rd International Symposium on Computer Architecture (2006)
Boston, MA
June 17, 2006 to June 21, 2006
ISBN: 0-7695-2608-X
TABLE OF CONTENTS
Introduction
pp. xiv
pp. xiv
Introduction
pp. xvii
Keynote 1
Session 1: Interconnection Networks
Chrysostomos Nicopoulos , Pennsylvania State University
Dongkook Park , Pennsylvania State University
pp. 4-15
Dennis Abts , Cray Inc., Chippewa Falls,Wisconsin
John Kim , Stanford University
William J. Dally , Stanford University
pp. 16-28
Session 2: Memory Models
Arvind Arvind , MIT CSAIL
Jan-Willem Maessen , Sun Microsystems Laboratories, Burlington, MA
pp. 29-40
Harold W. Cain , IBM T.J. Watson Research Center, Yorktown Heights, NY
Jong-Deok Choi , IBM T.J. Watson Research Center, Yorktown Heights, NY
Christoph von Praun , IBM T.J. Watson Research Center, Yorktown Heights, NY
pp. 41-52
JaeWoong Chung , Stanford University
Brian D. Carlstrom , Stanford University
Chi Cao Minh , Stanford University
Hassan Chafi , Stanford University
Christos Kozyrakis , Stanford University
Austen McDonald , Stanford University
pp. 53-65
Session 3: Power and Thermal Management
Phil Leech , Hewlett Packard
David Irwin , Duke University
Parthasarathy Ranganathan , Hewlett Packard
pp. 66-77
Yuan Lin , University of Michigan at Ann Arbor
Hyunseok Lee , University of Michigan at Ann Arbor
Mark Woh , University of Michigan at Ann Arbor
Yoav Harel , University of Michigan at Ann Arbor
Scott Mahlke , University of Michigan at Ann Arbor
Trevor Mudge , University of Michigan at Ann Arbor
Chaitali Chakrabarti , Arizona State University
Krisztian Flautner , ARM, Ltd.n Cambridge,UK
pp. 89-101
Session 4: Multicore
Weidong Shi , Georgia Institute of Technology
Laura `Falk , University of Michigan, Ann Arbor
Mrinmoy Ghosh , Georgia Institute of Technology
pp. 102-113
Gautham N. Chinya , Microarchitecture Research Lab, Intel Corporation
Jamison D. Collins , Microarchitecture Research Lab, Intel Corporation
Perry H. Wang , Microarchitecture Research Lab, Intel Corporation
Ryan Rakvic , Microarchitecture Research Lab, Intel Corporation
Hong Wang , Microarchitecture Research Lab, Intel Corporation
John P. Shen , Microarchitecture Research Lab, Intel Corporation
pp. 114-127
Keynote 2
Session 5A: Memory Access Issues
Feihui Li , Pennsylvania State University
Thomas Richardson , Pennsylvania State University
Yuan Xie , Pennsylvania State University
Vijaykrishnan Narayanan , Pennsylvania State University
Mahmut Kandemir , Pennsylvania State University
pp. 130-141
Session 5B: Cache Design I
Chuanjun Zhang , University of Missouri-Kansas City
pp. 155-166
Daniel N. Lynch , University of Texas at Austin
Moinuddin K. Qureshi , University of Texas at Austin
Yale N. Patt , University of Texas at Austin
pp. 167-178
Session 6A: Security and Network Processors
Daniel Englender , Georgia Institute of Technology
Milos Prvulovic , Georgia Institute of Technology
Brian Rogers , North Carolina State University
Chenyu Yan , Georgia Institute of Technology
pp. 179-190
Srihari Cadambi , NEC Laboratories America Inc., Princeton, NJ
Venkatta Jakkula , NEC Laboratories America Inc., Princeton, NJ
Srimat Chakradhar , NEC Laboratories America Inc., Princeton, NJ
pp. 203-215
Session 6B: Multithreading
Christopher B. Colohan , Google, Inc.
Anastassia Ailamaki , Carnegie Mellon University
J. Gregory Steffan , University of Toronto
Todd C. Mowry , Intel Research Pittsburgh
pp. 216-226
James Tuck , University of Illinois at Urbana-Champaign
Josep Torrellas , University of Illinois at Urbana-Champaign
Luis Ceze , University of Illinois at Urbana-Champaign
pp. 227-238
Seungryul Choi , University of Maryland
Donald Yeung , University of Maryland
pp. 239-251
Session 7A: Cache Design II
Thomas F. Wenisch , Carnegie Mellon University
Anastassia Ailamaki , Carnegie Mellon University
Babak Falsafi , Carnegie Mellon University
Stephen Somogyi , Carnegie Mellon University
pp. 252-263
Jichuan Chang , University of Wisconsin-Madison
Gurindar S. Sohi , University of Wisconsin-Madison
pp. 264-276
Session 7B: Potpourri
Shiliang Hu , University of Wisconsin
pp. 277-288
Weijun Xiao , University of Rhode Island
Qing Yang , University of Rhode Island
pp. 289-301
Session 8A: Dataflow
Andrew Putnam , University of Washington
Martha Mercaldi , University of Washington
Steven Swanson , University of Washington
Ken Michelson , University of Washington
Andrew Petersen , University of Washington
Andrew Schwerin , University of Washington
Mark Oskin , University of Washington
Susan J. Eggers , University of Washington
pp. 314-326
Session 8B: Cache Coherence
Xiaowei Shen , IBM T. J. Watson Research Center
Karin Strauss , University of Illinois, Urbana-Champaign
pp. 327-338
Naveen Muralimanohar , University of Utah
Karthik Ramani , University of Utah
Rajeev Balasubramonian , University of Utah
John B. Carter , University of Utah
pp. 339-351
Keynote 3
Session 9: Quantum Computing
Kae Nemoto , National Institute of Informatics, Japan
W. J. Munro , Hewlett-Packard Laboratories, UK
Kohei M. Itoh , Keio University and CREST-JST
pp. 354-365
Yatish Patel , University of California, Berkeley
Mark Whitney , University of California, Berkeley
Nemanja Isailovic , University of California, Berkeley
pp. 366-377
Tzvetan S. Metodi , University of California at Davis
Andrew W. Cross , Massachusetts Institute of Technology
Isaac L. Chuang , Massachusetts Institute of Technology
Frederic T. Chong , University of California at Santa Barbara
pp. 378-390
Author Index
Author Index (PDF)
pp. 391
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