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Computer Architecture, International Symposium on (2005)
Madison, Wisconsin
June 4, 2005 to June 8, 2005
ISBN: 0-7695-2270-X
TABLE OF CONTENTS
Introduction
pp. xvii,xviii
Committees (PDF)
pp. xvi
Session 1: Security
Ruby B. Lee , Princeton University
Peter C. S. Kwan , Princeton University
John P. McGregor , Princeton University
Jeffrey Dwoskin , Princeton University
Zhenghong Wang , Princeton University
pp. 2-13
Weidong Shi , Georgia Institute of Technology
Hsien-Hsin S. Lee , Georgia Institute of Technology
Mrinmoy Ghosh , Georgia Institute of Technology
Chenghuai Lu , Georgia Institute of Technology
Alexandra Boldyreva , Georgia Institute of Technology
pp. 14-24
G. Edward Suh , Massachusetts Institute of Technology
Charles W. O?Donnell , Massachusetts Institute of Technology
Ishan Sachdev , Massachusetts Institute of Technology
Srinivas Devadas , Massachusetts Institute of Technology
pp. 25-36
Session 2a: Interacting with Disks and Networks
Sudhanva Gurumurthi , Pennsylvania State University
Anand Sivasubramaniam , Pennsylvania State University
Vivek K. Natarajan , Pennsylvania State University
pp. 38-49
Ram Huggahalli , Intel Corporation
Ravi Iyer , Intel Corporation
Scott Tetrick , Intel Corporation
pp. 50-59
Haryadi S. Gunawi , University of Wisconsin - Madison
Nitin Agrawal , University of Wisconsin - Madison
Andrea C. Arpaci-Dusseau , University of Wisconsin - Madison
Remzi H. Arpaci-Dusseau , University of Wisconsin - Madison
Jiri Schindler , EMC Corporation
pp. 60-71
Session 2b: Memory Compression and Renamer Optimizations
pp. 86-97
Session 3a: Specialized Processors
Lin Tan , University of California at Santa Barbara
Timothy Sherwood , University of California at Santa Barbara
pp. 112-122
Florin Baboescu , University of California at San Diego
Dean M. Tullsen , University of California at San Diego
Grigore Rosu , University of Illinois at Urbana-Champaign
Sumeet Singh , University of California at San Diego
pp. 123-133
Shorin Kyo , NEC Corporation
Shin?ichiro Okazaki , NEC Corporation
Tamio Arai , University of Tokyo
pp. 134-145
Session 3b: Detecting Faults
George A. Reis , Princeton University
Jonathan Chang , Princeton University
Neil Vachharajani , Princeton University
Ram Rangan , Princeton University
David I. August , Princeton University
Shubhendu S. Mukherjee , Intel Massachusetts
pp. 148-159
Ethan Schuchman , Purdue University
T. N. Vijaykumar , Purdue University
pp. 160-171
Mohamed A. Gomaa , Purdue University
T. N. Vijaykumar , Purdue University
pp. 172-183
Session 4a: Quantum Computing and Very Low Power
Steven Balensiefer , University of Washington
Lucas Kregor-Stickles , University of Washington
Mark Oskin , University of Washington
pp. 186-196
Leyla Nazhandali , University of Michigan
Bo Zhai , University of Michigan
Javin Olson , University of Michigan
Anna Reeves , University of Michigan
Michael Minuth , University of Michigan
Ryan Helfand , University of Michigan
Sanjay Pant , University of Michigan
Todd Austin , University of Michigan
David Blaauw , University of Michigan
pp. 197-207
Mark Hempstead , Harvard University
Nikhil Tripathi , Harvard University
Patrick Mauro , Harvard University
Gu-Yeon Wei , Harvard University
David Brooks , Harvard University
pp. 208-219
Session 4b: Coherence
Thomas F. Wenisch , Carnegie Mellon University
Stephen Somogyi , Carnegie Mellon University
Nikolaos Hardavellas , Carnegie Mellon University
Jangwoo Kim , Carnegie Mellon University
Anastassia Ailamaki , Carnegie Mellon University
Babak Falsafi , Carnegie Mellon University
pp. 222-233
Jason F. Cantin , University of Wisconsin - Madison
Mikko H. Lipasti , University of Wisconsin - Madison
James E. Smith , University of Wisconsin - Madison
pp. 246-257
Session 5a: Applying Compilers and Debugging Support
Stephen Hines , Florida State University
Joshua Green , Florida State University
Gary Tyson , Florida State University
David Whalley , Florida State University
pp. 260-271
Nathan Clark , University of Michigan - Ann Arbor
Jason Blome , University of Michigan - Ann Arbor
Michael Chu , University of Michigan - Ann Arbor
Scott Mahlke , University of Michigan - Ann Arbor
Stuart Biles , ARM, Ltd.
Kriszti? Flautner , ARM, Ltd.
pp. 272-283
Satish Narayanasamy , University of California at San Diego
Gilles Pokam , University of California at San Diego
Brad Calder , University of California at San Diego
pp. 284-295
Session 5b: Power
Murali Annavaram , Intel Corporation
Ed Grochowski , Intel Corporation
John Shen , Intel Corporation
pp. 298-309
Emil Talpes , Carnegie Mellon University
Diana Marculescu , Carnegie Mellon University
pp. 310-321
Vlad Petric , University of Pennsylvania
Amir Roth , University of Pennsylvania
pp. 322-333
Session 6a: Chip Multiprocessor Memory Hierarchies
Michael Zhang , Massachusetts Institute of Technology
Krste Asanović , Massachusetts Institute of Technology
pp. 336-345
Evan Speight , IBM Research
Hazim Shafi , IBM Research
Lixin Zhang , IBM Research
Ram Rajamony , IBM Research
pp. 346-356
Zeshan Chishti , Purdue University
Michael D. Powell , Purdue University
T. N. Vijaykumar , Purdue University
pp. 357-368
Session 6b: Runahead and Branch Prediction
Onur Mutlu , University of Texas at Austin
Hyesoon Kim , University of Texas at Austin
Yale N. Patt , University of Texas at Austin
pp. 370-381
Daniel A. Jiménez , Rutgers University
pp. 382-393
Session 7a: Interconnection Networks
Rakesh Kumar , University of California at San Diego
Victor Zyuban , IBM TJ Watson Research Center
Dean M. Tullsen , University of California at San Diego
pp. 408-419
John Kim , Stanford University
William J. Dally , Stanford University
Brian Towles , D.E. Shaw Research and Development
Amit K. Gupta , Stanford University
pp. 420-431
Daeho Seo , Purdue University
Akif Ali , Purdue University
Won-Taek Lim , Purdue University
Nauman Rafique , Purdue University
Mithuna Thottethodi , Purdue University
pp. 432-443
Session 7b: Load and Store Queues
Amit Gandhi , Portland State University
Haitham Akkary , Intel Corporation
Ravi Rajwar , Intel Corporation
Srikanth T. Srinivasan , Intel Corporation
Konrad Lai , Intel Corporation
pp. 446-457
E. F. Torres , University de Zaragoza
P. Iba? , University de Zaragoza
V. Vi?als , University de Zaragoza
J. M. Llaber? , University Polit?cnica de Catalunya
pp. 469-480
Session 8a: Multiprocessor Issues
Albert Meixner , Duke University
Daniel J. Sorin , Duke University
pp. 482-493
Ravi Rajwar , Intel Corporation
Maurice Herlihy , Brown University
Konrad Lai , Intel Corporation
pp. 494-505
Saisanthosh Balakrishnan , University of Wisconsin-Madison
Ravi Rajwar , Intel Corporation
Mike Upton , Intel Corporation
Konrad Lai , Intel Corporation
pp. 506-517
Session 8b: Reliability and a Cache Organization
Jayanth Srinivasan , University of Illinois at Urbana-Champaign
Sarita V. Adve , University of Illinois at Urbana-Champaign
Pradip Bose , IBM T.J. Watson Research Center
Jude A. Rivers , IBM T.J. Watson Research Center
pp. 520-531
Arijit Biswas , Intel Corp.
Paul Racunas , Intel Corp.
Razvan Cheveresan , Sun Microsystems
Joel Emer , Intel Corp.
Ram Rangan , Princeton University
pp. 532-543
Moinuddin K. Qureshi , University of Texas at Austin
David Thompson , University of Texas at Austin
Yale N. Patt , University of Texas at Austin
pp. 544-555
Author Index
Author Index (PDF)
pp. 556-557
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