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Proceedings. 31st Annual International Symposium on Computer Architecture (2004)
Munchen, Germany
June 23, 2004 to June 23, 2004
ISBN: 0-7695-2143-6
TABLE OF CONTENTS
Committees (PDF)
pp. xi
Reviewers (PDF)
pp. xiii
Keynote 1
Session 1: Architecture Evaluations
Michael Bedford Taylor , CSAIL, Massachusetts Institute of Technology
Walter Lee , CSAIL, Massachusetts Institute of Technology
Jason Miller , CSAIL, Massachusetts Institute of Technology
David Wentzlaff , CSAIL, Massachusetts Institute of Technology
Ian Bratt , CSAIL, Massachusetts Institute of Technology
Ben Greenwald , CSAIL, Massachusetts Institute of Technology
Henry Hoffmann , CSAIL, Massachusetts Institute of Technology
Paul Johnson , CSAIL, Massachusetts Institute of Technology
Jason Kim , CSAIL, Massachusetts Institute of Technology
James Psota , CSAIL, Massachusetts Institute of Technology
Arvind Saraf , CSAIL, Massachusetts Institute of Technology
Nathan Shnidman , CSAIL, Massachusetts Institute of Technology
Volker Strumpen , CSAIL, Massachusetts Institute of Technology
Matt Frank , CSAIL, Massachusetts Institute of Technology
Saman Amarasinghe , CSAIL, Massachusetts Institute of Technology
Anant Agarwal , CSAIL, Massachusetts Institute of Technology
pp. 2
Jung Ho Ahn , Stanford University, CA
William J. Dally , Stanford University, CA
Brucek Khailany , Stanford University, CA
Ujval J. Kapasi , Stanford University, CA
Abhishek Das , Stanford University, CA
pp. 14
John W. Sias , University of Illinois at Urbana-Champaign
Sain-zee Ueng , University of Illinois at Urbana-Champaign
Geoff A. Kent , University of Illinois at Urbana-Champaign
Ian M. Steiner , University of Illinois at Urbana-Champaign
Erik M. Nystrom , University of Illinois at Urbana-Champaign
Wen-mei W. Hwu , University of Illinois at Urbana-Champaign
pp. 26
Session 2A: Parallelism in Microarchitectures
T. N. Vijaykumar , Purdue University
Zeshan Chishti , Purdue University
pp. 40
Ronny Krashinsky , MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA
Christopher Batten , MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA
Mark Hampton , MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA
Steve Gerding , MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA
Brian Pharris , MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA
Jared Casper , MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA
Krste Asanovic , MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA
pp. 52
Rakesh Kumar , University of California, San Diego
Dean M. Tullsen , University of California, San Diego
Parthasarathy Ranganathan , HP Labs, Palo Alto, CA
Norman P. Jouppi , HP Labs, Palo Alto, CA
Keith I. Farkas , HP Labs, Palo Alto, CA
pp. 64
Yuan Chou , Sun Microsystems, Sunnyvale, CA
Brian Fahs , Sun Microsystems, Sunnyvale, CA
Santosh Abraham , Sun Microsystems, Sunnyvale, CA
pp. 76
Session 2B: Memory Consistency
Harold W. Cain , Univ. of Wisconsin-Madison
Mikko H. Lipasti , Univ. of Wisconsin-Madison
pp. 90
Lance Hammond , Stanford University
Vicky Wong , Stanford University
Mike Chen , Stanford University
Brian D. Carlstrom , Stanford University
John D. Davis , Stanford University
Ben Hertzberg , Stanford University
Manohar K. Prabhu , Stanford University
Honggo Wijaya , Stanford University
Christos Kozyrakis , Stanford University
Kunle Olukotun , Stanford University
pp. 102
Sudheendra Hangal , Sun Microsystems India Private Limited, Bangalore, India
Durgam Vahia , Sun Microsystems, Sunnyvale, CA
Chaiyasit Manovit , Sun Microsystems, Sunnyvale, CA
Juin-Yeu Joseph Lu , Sun Microsystems, Sunnyvale, CA
Sridhar , Sun Microsystems, Sunnyvale, CA
pp. 114
Mainak Chaudhuri , Cornell University, Ithaca, NY
Mark Heinrich , University of Central Florida
pp. 124
Panel: Supporting ILP in Tiled Architectures: Wasted Effort, or a Good Idea?
null (PDF)
pp. null
Keynote 2
Session 3A: Power and Energy
Christopher J. Hughes , Intel Corporation
Sarita V. Adve , University of Illinois at Urbana-Champaign
pp. 138
John Oliver , University of California, Davis
Ravishankar Rao , University of California, Davis
Paul Sultana , University of California, Davis
Jedidiah Crandall , University of California, Davis
Erik Czernikowski , University of California, Davis
Leslie W. Jones IV , California Polytechnic State University, San Luis Obispo
Diana Franklin , California Polytechnic State University, San Luis Obispo
Venkatesh Akella , University of California, Davis
Frederic T. Chong , University of California, Davis
pp. 150
Roni Rosner , Intel Labs, Haifa, Israel
Yoav Almog , Intel Labs, Haifa, Israel
Micha Moffie , Intel Labs, Haifa, Israel
Naftali Schwartz , Intel Labs, Haifa, Israel
Avi Mendelson , Intel Labs, Haifa, Israel
pp. 162
Session 3B: Interconnect and I/O
Lakshmi N. Bairavasundaram , University of Wisconsin-Madison
Muthian Sivathanu , University of Wisconsin-Madison
Andrea C. Arpaci-Dusseau , University of Wisconsin-Madison
Remzi H. Arpaci-Dusseau , University of Wisconsin-Madison
pp. 176
Robert Mullins , University of Cambridge, UK
Andrew West , University of Cambridge, UK
Simon Moore , University of Cambridge, UK
pp. 188
V. Puente , University of Cantabria, Spain
J. A. Gregorio , University of Cantabria, Spain
F. Vallejo , University of Cantabria, Spain
R. Beivide , University of Cantabria, Spain
pp. 198
Session 4A: Compression and Debugging
Alaa R. Alameldeen , University of Wisconsin-Madison
David A. Wood , University of Wisconsin-Madison
pp. 212
Pin Zhou , University of Illinois at Urbana-Champaign
Feng Qin , University of Illinois at Urbana-Champaign
Wei Liu , University of Illinois at Urbana-Champaign
Yuanyuan Zhou , University of Illinois at Urbana-Champaign
Josep Torrellas , University of Illinois at Urbana-Champaign
pp. 224
Session 4B: Superscalars
Ayose Falc? , Universitat Polit?cnica de Catalunya
Jared Stark , Intel Corporation
Alex Ramirez , Universitat Polit?cnica de Catalunya
Konrad Lai , Intel Corporation
Mateo Valero , Universitat Polit?cnica de Catalunya
pp. 250
Session 5A: Support for Reliability
Christopher Weaver , Intel Corporation, Hudson MA
Joel Emer , Intel Corporation, Hudson MA
Shubhendu S. Mukherjee , Intel Corporation, Hudson MA
Steven K. Reinhardt , Intel Corporation, Hudson MA; University of Michigan, Ann Arbor
pp. 264
Jayanth Srinivasan , University of Illinois at Urbana-Champaign
Sarita V. Adve , University of Illinois at Urbana-Champaign
Pradip Bose , IBM T.J. Watson Research Center, Yorktown Heights, NY
Jude A. Rivers , IBM T.J. Watson Research Center, Yorktown Heights, NY
pp. 276
Michael D. Powell , Purdue University
T. N. Vijaykumar , Purdue University
pp. 288
Session 5B: Register File
J. Adam Butts , University of Wisconsin-Madison
Gurindar S. Sohi , University of Wisconsin-Madison
pp. 302
Rub?n Gonz?lez , Universitat Polit?nica de Catalunya
Adri? Cristal , Universitat Polit?nica de Catalunya
Daniel Ortega , HP Labs Barcelona
Alexander Veidenbaum , University of California, Irvine
Mateo Valero , Universitat Polit?nica de Catalunya
pp. 314
Mikko H. Lipasti , University of Wisconsin-Madison
Brian R. Mestan , IBM Corporation - Austin, TX
Erika Gunadi , University of Wisconsin-Madison
pp. 325
Session 6A: Performance Methodologies
Tejas S. Karkhanis , Univ. of Wisconsin - Madison
James E. Smith , Univ. of Wisconsin - Madison
pp. 338
Lieven Eeckhout , Ghent University, Belgium
Robert H. Bell Jr. , The University of Texas at Austin
Bastiaan Stougie , Ghent University, Belgium
Koen De Bosschere , Ghent University, Belgium
Lizy K. John , The University of Texas at Austin
pp. 350
Session 6B: Microarchitectural Concepts
Bharath Iyer , University of Maryland, College Park
Sadagopan Srinivasan , University of Maryland, College Park
Bruce Jacob , University of Maryland, College Park
pp. 364
Angshuman Parashar , The Pennsylvania State University
Sudhanva Gurumurthi , The Pennsylvania State University
Anand Sivasubramaniam , The Pennsylvania State University
pp. 376
Author Index (PDF)
pp. 387
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