- I
- ISCA
- 2003
- 30th Annual International Symposium on Computer Architecture (ISCA'03)
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30th Annual International Symposium on Computer Architecture (ISCA'03) San Diego, California June 09-June 11 ISBN: 0-7695-1945-8 Table of Contents
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 | Session 1: Thermal and Energy-Aware Microarchitectures |
 | Session 2: Processor Architecture |
 | Panel: Subsetting SPEC When Measuring Results: Valid or Manipulative? |
 | Session 3a: Microarchitecture Techniques |
 | Session 3b: Recovery and Replay |
Min Xu, Univ. of Wisconsin-Madison
Rastislav Bodik, Univ. of Wisconsin-Madison; Univ. of California, Berkeley; IBM T.J. Watson Research Center
Mark D. Hill, Univ. of Wisconsin-Madison; Universitat Polit?cnica de Catalunya (UPC) pp. 122
 | Session 4a: Energy-Saving Designs |
Jose Renau, University of Illinois at Urbana-Champaign pp. 157
 | Session 4b: Interconnects and Multiprocessors |
 | Session 5: Front-End Scheduling |
 | Session 6a: Clustered Processors |
 | Session 6b: Network Processors |
 | Session 7a: Prediction |
 | Session 7b: Mechanisms and Support |
 | Session 8: Memory Issues |
Jinwoo Suh, University of Southern California/Information Sciences Institute
Eun-Gyu Kim, University of Southern California/Information Sciences Institute
Stephen P. Crago, University of Southern California/Information Sciences Institute pp. 410
 | Session 9: Exploiting Parallelisms | Usage of this product signifies your acceptance of the Terms of Use.
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