- I
- IPPS
- 1997
- 11th International Parallel Processing Symposium (IPPS '97)
| | This Publication | |
| | | |
| |
| |
| | Bibliographic References | |
| |
| |
| | |
11th International Parallel Processing Symposium (IPPS '97)
Geneva, SWITZERLAND
April 01-April 05
ISBN: 0-8186-7792-9
Table of Contents
 | Session 1: Architecture: Chair: Mateo Valero |
J. Heinlein, Comput. Syst. Lab., Stanford Univ., CA, USA
R. Bosch Jr, Comput. Syst. Lab., Stanford Univ., CA, USA
A. Gupta, Comput. Syst. Lab., Stanford Univ., CA, USA
pp. 18
V. Moshnyaga, Dept. of Electron. & Commun., Kyoto Univ., Japan
K. Tamaru, Dept. of Electron. & Commun., Kyoto Univ., Japan
pp. 28
 | Session 2: Networks I: Chair: Sartaj Sahni |
H. Chen, Dept. of Electron. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
S. Hu, Dept. of Electron. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
pp. 65
S. Warnakulasuriya, Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
T. Pinkston, Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
pp. 80
 | Session 3: Tools: Chair: Alok Choudhary |
A.D. Pimentel, Dept. of Computer Science, University of Amsterdam
pp. 94
 | Session 4: Scheduling: Chair: Allan Gottlieb |
J. Liou, AT&T Bell Labs., Middletown, NJ, USA
M. Palis, AT&T Bell Labs., Middletown, NJ, USA
pp. 152
G. Park, Dept. of Comput. Sci. & Eng., Texas Univ., Arlington, TX, USA
B. Shirazi, Dept. of Comput. Sci. & Eng., Texas Univ., Arlington, TX, USA
J. Marquis, Dept. of Comput. Sci. & Eng., Texas Univ., Arlington, TX, USA
pp. 157
 | Session 5: Applications: Chair: Josep Diaz |
J. Lou, Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
J. Farrara, Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
pp. 174
J. Brehm, Inst. fur Rechnerstrukturen und Betriebssysteme, Hannover Univ., Germany
P. Worley, Inst. fur Rechnerstrukturen und Betriebssysteme, Hannover Univ., Germany
pp. 187
B. VanVoorst, Technol. Center, Honeywell Inc., Minneapolis, MN, USA
L. Pires, Technol. Center, Honeywell Inc., Minneapolis, MN, USA
R. Jha, Technol. Center, Honeywell Inc., Minneapolis, MN, USA
M. Muhhamad, Technol. Center, Honeywell Inc., Minneapolis, MN, USA
pp. 192
 | Session 6: Performance Evaluation: Chair: Jose D.P. Rolim |
A. Downey, Comput. Sci. Div., California Univ., Berkeley, CA, USA
pp. 209
S. Nemawarkar, Sch. of Comput. Sci., McGill Univ., Montreal, Que., Canada
G. Gao, Sch. of Comput. Sci., McGill Univ., Montreal, Que., Canada
pp. 227
Hiroaki Fujii, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Yoshiko Yasuda, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Hideya Akashi, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Yasuhiro Inagami, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Makoto Koga, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Osamu Ishihara, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Masamori Kashiyama, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Hideo Wada, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
Tsutomu Sumimoto, Central Research Laboratory, Hitachi Ltd. General Purpose Computer Division, Hitachi Ltd.
pp. 233
 | Session 7: Synchronization and Threads: Chair: Kai Li |
M. Michael, Dept. of Comput. Sci., Rochester Univ., NY, USA
M. Scott, Dept. of Comput. Sci., Rochester Univ., NY, USA
pp. 267
X. Martorell, Dept. d'Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain
J. Labarta, Dept. d'Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain
N. Navarro, Dept. d'Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain
E. Ayguade, Dept. d'Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain
pp. 281
 | Session 8: Algorithms I: Chair: Sanguthevar Rajasekaran |
J. Choi, Sch. of Comput., Soongsil Univ., Seoul, South Korea
pp. 310
 | Session 9: Routing: Chair: Gianfranco Bilardi |
Hideo Wada, Central Research Laboratory, Hitachi Ltd
pp. 346
 | Session 10: I/O and Message Passing: Chair: Anthony Skjellum |
S. More, Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
A. Choudhary, Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
I. Foster, Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
M. Xu, Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
pp. 368
Y. Chen, Dept. of Comput. Sci., Princeton Univ., NJ, USA
E. Felten, Dept. of Comput. Sci., Princeton Univ., NJ, USA
pp. 381
 | Session 11: Algorithms II: Chair: Tao Yang |
D.S.L. Wei, University of Florida and University of Aizu
pp. 397
A. Brüngger, Inst. for Theor. Comput. Sci., Swiss Federal Inst. of Technol., Zurich, Switzerland
A. Marzetta, Inst. for Theor. Comput. Sci., Swiss Federal Inst. of Technol., Zurich, Switzerland
J. Clausen, Inst. for Theor. Comput. Sci., Swiss Federal Inst. of Technol., Zurich, Switzerland
M. Perregaard, Inst. for Theor. Comput. Sci., Swiss Federal Inst. of Technol., Zurich, Switzerland
pp. 418
 | Session 12: Runtime: Chair: Hans Zima |
 | Session 13: Shared Memory: Chair: James Philbin |
P. Lu, Dept. of Comput. Sci., Toronto Univ., Ont., Canada
pp. 467
 | Session 14: Algorithms III: Chair: Uzi Vishkin |
 | Session 15: Compilers I: Chair: Emilio Zapata |
 | Session 16: Networks II: Chair: Timothy Pinkston |
Yuzhong Sun, National Research Center for Intelligent Computers
Zhiwei Xu, National Research Center for Intelligent Computers
Mingfa Zhu, National Research Center for Intelligent Computers
pp. 565
F. Petrini, Dipartimento di Inf., Pisa Univ., Italy
pp. 589
 | Session 17: Algorithms IV: Chair: Sajal Das |
Xiaotie Deng, Department of Computer Science York University
pp. 596
C. Ho, Dept. of Comput. Sci., Nat. Central Univ., Chung-Li, Taiwan
S. Hsieh, Dept. of Comput. Sci., Nat. Central Univ., Chung-Li, Taiwan
G. Chen, Dept. of Comput. Sci., Nat. Central Univ., Chung-Li, Taiwan
pp. 603
 | Session 18: Compilers II: Chair: Prith Banerjee |
K. Gopinath, Dept. of Comput. Sci. & Autom., Indian Inst. of Sci., Bangalore, India
R. Seshadri, Dept. of Comput. Sci. & Autom., Indian Inst. of Sci., Bangalore, India
pp. 628
 | Session 19: Architecture Theory: Chair: Ali Hurson |
S. Roy, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
P. Banerjee, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 665
 | Session 20: Data Structures: Chair: Afonso Ferreira |
G. Brodal, Dept. of Comput. Sci., Aarhus Univ., Denmark
J. Träff, Dept. of Comput. Sci., Aarhus Univ., Denmark
pp. 689
V. Auletta, Dipartimento di Inf. ed Applicazioni, Salerno Univ., Italy
A. de Vivo, Dipartimento di Inf. ed Applicazioni, Salerno Univ., Italy
V. Scarano, Dipartimento di Inf. ed Applicazioni, Salerno Univ., Italy
pp. 694
 | Session 21: Networks III: Chair: Helmar Burkhart |
 | Industrial Track:Invited Vendor Presentations |
W. Hahn, Electron. & Telecommun. Res. Inst., Taejon, South Korea
K. Rim, Electron. & Telecommun. Res. Inst., Taejon, South Korea
S. Kim, Electron. & Telecommun. Res. Inst., Taejon, South Korea
pp. 744
D. Avresky, Dept. of Electr. Comput. Eng., Boston Univ., MA, USA
V. Shurbanov, Dept. of Electr. Comput. Eng., Boston Univ., MA, USA
R. Horst, Dept. of Electr. Comput. Eng., Boston Univ., MA, USA
W. Watson, Dept. of Electr. Comput. Eng., Boston Univ., MA, USA
L. Young, Dept. of Electr. Comput. Eng., Boston Univ., MA, USA
D. Jewett, Dept. of Electr. Comput. Eng., Boston Univ., MA, USA
pp. 756
Usage of this product signifies your acceptance of the
Terms of Use.
| | | | | | | |