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2009 IEEE International Symposium on Parallel&Distributed Processing
Parallel data-locality aware stencil computations on modern micro-architectures
Rome, Italy
May 23-May 29
ISBN: 978-1-4244-3751-1
Matthias Christen, High Performance and Web Computing Group, Computer Science Dept., University of Basel, Switzerland
Olaf Schenk, High Performance and Web Computing Group, Computer Science Dept., University of Basel, Switzerland
Esra Neufeld, IT'IS Foundation, ETH Zurich, Switzerland
Peter Messmer, Tech-X Corporation, Boulder CO, USA
Helmar Burkhart, High Performance and Web Computing Group, Computer Science Dept., University of Basel, Switzerland
Novel micro-architectures including the Cell Broadband Engine Architecture and graphics processing units are attractive platforms for compute-intensive simulations. This paper focuses on stencil computations arising in the context of a biomedical simulation and presents performance benchmarks on both the Cell BE and GPUs and contrasts them with a benchmark on a traditional CPU system. Due to the low arithmetic intensity of stencil computations, typically only a fraction of the peak performance of the compute hardware is reached. An algorithm is presented, which reduces the bandwidth requirements and thereby improves performance by exploiting temporal locality of the data. We report on performance improvements over CPU implementations.
Citation:
Matthias Christen, Olaf Schenk, Esra Neufeld, Peter Messmer, Helmar Burkhart, "Parallel data-locality aware stencil computations on modern micro-architectures," ipdps, pp.1-10, 2009 IEEE International Symposium on Parallel&Distributed Processing, 2009
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