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19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 9
Impact of Page Size on Communication Performance
Denver, Colorado
April 04-April 08
ISBN: 0-7695-2312-9
| ASCII Text | x | ||
| Xiaocheng Zhou, Zhigang Huo, Ninghui Sun, Yingchao Zhou, "Impact of Page Size on Communication Performance," Parallel and Distributed Processing Symposium, International, vol. 10, pp. 212b, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 9, 2005. | |||
| BibTex | x | ||
| @article{ 10.1109/IPDPS.2005.250, author = {Xiaocheng Zhou and Zhigang Huo and Ninghui Sun and Yingchao Zhou}, title = {Impact of Page Size on Communication Performance}, journal ={Parallel and Distributed Processing Symposium, International}, volume = {10}, year = {2005}, issn = {1530-2075}, pages = {212b}, doi = {http://doi.ieeecomputersociety.org/10.1109/IPDPS.2005.250}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Parallel and Distributed Processing Symposium, International TI - Impact of Page Size on Communication Performance SN - 1530-2075 SP EP A1 - Xiaocheng Zhou, A1 - Zhigang Huo, A1 - Ninghui Sun, A1 - Yingchao Zhou, PY - 2005 KW - null VL - 10 JA - Parallel and Distributed Processing Symposium, International ER - | |||
In this paper, the impact of page size on the communication performance is studied. In the interconnection communication of cluster system, the address translation table (ATT), which is located in the memory of the network interface card (NIC) and can in a way be seen as the translation look-aside buffer (TLB) used by the NIC processor, is usually used to translate virtual address to physical address by NIC. The page size of operating system not only affects the compulsory and capacity miss rate, but also the hit time and the miss penalty of ATT in some implementations. With a large page size, we can get lower ATT miss rate, shorter hit time and miss penalty to improve the communication performance. To test the impact of the page size, a Linux module based on AMD Opteron™ processor is implemented to allocate both normal pages and super pages and the address translation mechanism in Myrinet GM is also extended to support either normal pages or super pages. With super pages, the latency of Ping-pong test can be reduced 4.3 us and the bandwidth can improve 55.3 MB/s in some case. The Linpack test results of 11 TFLOPS Dawning 4000A show that the Linpack efficiency can be increased from 0.66% to 2.86% for different number of processors.
Citation:
Xiaocheng Zhou, Zhigang Huo, Ninghui Sun, Yingchao Zhou, "Impact of Page Size on Communication Performance," ipdps, vol. 10, pp.212b, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 9, 2005
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