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Santa Fe, NM, USA
April 26, 2004 to April 30, 2004
ISBN: 0-7695-2132-0
pp: 44b
Chrilly Donninger , University of Paderborn
Alex Kure , University of Paderborn
Ulf Lorenz , University of Paderborn
<p>In times when the FPGA technology has reached maturity such that complex designs are possible, the boarder between hard- and software vanishes. It is now possible to develop .ne grained parallel applications without the long-lasting chip design cycles. Simultanously, by the help of message passing libraries like MPI it is easy to write coarse grained parallel applications. The chess program Brutus is a high level application which profits from both worlds.</p> <p>When playing board games like chess, checkers, othello etc., computers use game tree search algorithms to evaluate a position. The most spectacular success of a game playing program so far, has been the victory of the chess machine 'Deep Blue' vs. G. Kasparov, the best human chess player in the world, at that time. The world has now reached the point that a chess program can not only win one match against a human top player, but they are just getting stronger than the best human players.</p> <p>We describe the design philosophy, general architechture and performance of the chess program Brutus, which has just won an International Grandmaster Tournament with seven wins and 4 draws. Brutus is split up in a hardware-and software engine. The hardware (indeed in FPGA simulated hardware) calculates the time critical part of the search tree near the leaves. The part near the root is done in software, where it is much easier to develop sophisticated algorithms. The FPGA cards allows the implementation of sophisticated chess knowledge without decreasing the computational speed. Thus, Brutus follows its famous predecessors Belle and Deep Blue.</p>
Chrilly Donninger, Alex Kure, Ulf Lorenz, "Parallel Brutus: The First Distributed, FPGA Accelerated Chess Program", IPDPS, 2004, Proceedings. 18th International Parallel and Distributed Processing Symposium, Proceedings. 18th International Parallel and Distributed Processing Symposium 2004, pp. 44b, doi:10.1109/IPDPS.2004.1302962
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