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2011 IEEE 17th International On-Line Testing Symposium
Matrix control-flow algorithm-based fault tolerance
Athens
July 13-July 15
ISBN: 978-1-4577-1053-7
R. R. Ferreira, Inst. de Inf., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
A. F. Moreira, Inst. de Inf., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
L. Carro, Inst. de Inf., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
A novel software-implemented hardware fault tolerance method based on encoding both the control and the data-flow segments of programs with matrices is proposed and evaluated. Results show an average speed-up of 3 times compared to standard duplication and comparison, with coverage higher than 95% for the case studies considered, which outperforms previous works in the field.
Index Terms:
matrix control flow algorithm-based fault tolerance, software-implemented hardware fault tolerance method, encoding, data flow program segments, MPSoC
Citation:
R. R. Ferreira, A. F. Moreira, L. Carro, "Matrix control-flow algorithm-based fault tolerance," iolts, pp.37-42, 2011 IEEE 17th International On-Line Testing Symposium, 2011
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