CSDL - Proceedings I

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Comparing transient-fault effects on synchronous and on asynchronous circuits (Abstract)

R. Possamai Bastos, TIMA Laboratory, INPG, Grenoble, France

Y. Monnet, TIEMPO, Montbonnot St Martin, France

G. Sicard, TIMA Laboratory, INPG, Grenoble, France

F. Kastensmidt, UFRGS, Instituto de Informática, PGMicro, Porto Alegre, Brazil

M. Renaudin, TIEMPO, Montbonnot St Martin, France

R. Reis, UFRGS, Instituto de Informática, PGMicro, Porto Alegre, Brazil

pp. 29-34

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Invariant checkers: An efficient low cost technique for run-time transient errors detection (Abstract)

Carmela Noro Grando, Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil

Carlos Arthur Lisboa, Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil

Alvaro Freitas Moreira, Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil

Luigi Carro, Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brazil

pp. 35-40

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Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults (Abstract)

Caroline Concatto, PPGC - PGMICRO - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

Pedro Almeida, PPGC - PGMICRO - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

Fernanda Kastensmidt, PPGC - PGMICRO - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

Erika Cota, PPGC - PGMICRO - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

Marcelo Lubaszewski, PPGC - PGMICRO - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

Marcos Herve, PPGC - PGMICRO - Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

pp. 61-66

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Evaluating Alpha-induced soft errors in embedded microprocessors (Abstract)

P. Rech, Università di Padova, Dipartimento di Ingegneria dell'Informazione, Italy

S. Gerardin, Università di Padova, Dipartimento di Ingegneria dell'Informazione, Italy

A. Paccagnella, Università di Padova, Dipartimento di Ingegneria dell'Informazione, Italy

P. Bernardi, Politecnico di Torino, Dipartimento di Automatica e Informatica, Italy

M. Grosso, Politecnico di Torino, Dipartimento di Automatica e Informatica, Italy

M. Sonza Reorda, Politecnico di Torino, Dipartimento di Automatica e Informatica, Italy

D. Appello, STMicroelectronics, Agrate Brianza (MI), Italy

pp. 69-74

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Enhanced self-configurability and yield in multicore grids (Abstract)

E. Kolonis, Department of Informatics, University of Piraeus, Greece

M. Nicolaidis, TIMA Laboratory, Grenoble, France

D. Gizopoulos, Department of Informatics, University of Piraeus, Greece

M. Psarakis, Department of Informatics, University of Piraeus, Greece

J.H. Collet, LAAS-CNRS, Toulouse, France

P. Zajac, Dep. of Microelectronics and Computer Science, Technical University of Lodz, Poland

pp. 75-80

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Online error detection and correction of erratic bits in register files (Abstract)

X. Vera, Intel Barcelona Research Center, Intel Labs - Universitat Politècnica de Catalunya, Barcelona, Spain

J. Abella, Intel Barcelona Research Center, Intel Labs - Universitat Politècnica de Catalunya, Barcelona, Spain

J. Carretero, Intel Barcelona Research Center, Intel Labs - Universitat Politècnica de Catalunya, Barcelona, Spain

P. Chaparro, Intel Barcelona Research Center, Intel Labs - Universitat Politècnica de Catalunya, Barcelona, Spain

A. Gonzalez, Intel Barcelona Research Center, Intel Labs - Universitat Politècnica de Catalunya, Barcelona, Spain

pp. 81-86

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Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs (Abstract)

Jose Rodrigo Azambuja, Universidade Federal do Rio Grande do Sul (UFRGS), Instituto de Informática, Av. Bento Gonçalves 9500, Porto Alegre - RS - Brazil

Fernando Sousa, Universidade Federal do Rio Grande do Sul (UFRGS), Instituto de Informática, Av. Bento Gonçalves 9500, Porto Alegre - RS - Brazil

Lucas Rosa, Universidade Federal do Rio Grande do Sul (UFRGS), Instituto de Informática, Av. Bento Gonçalves 9500, Porto Alegre - RS - Brazil

Fernanda Lima Kastensmidt, Universidade Federal do Rio Grande do Sul (UFRGS), Instituto de Informática, Av. Bento Gonçalves 9500, Porto Alegre - RS - Brazil

pp. 101-106

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Novel DRAM mitigation technique (Abstract)

A. Bougerol, EADS IW, the European Aeronautic Defense and Space Company, Innovation Works, 12 rue Pasteur, 92150, Suresnes, France

F. Miller, EADS IW, the European Aeronautic Defense and Space Company, Innovation Works, 12 rue Pasteur, 92150, Suresnes, France

N. Buard, EADS IW, the European Aeronautic Defense and Space Company, Innovation Works, 12 rue Pasteur, 92150, Suresnes, France

pp. 109-113

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Critical charge characterization in 6-T SRAMs during read mode (Abstract)

Sebastia Bota, Jaume Segura Grup de Sistemes Electronics. Balearic Islands University Carretera de Valldemossa km 7.5. 07122 Palma de Mallorca (Spain)

Gabriel Torrens, Jaume Segura Grup de Sistemes Electronics. Balearic Islands University Carretera de Valldemossa km 7.5. 07122 Palma de Mallorca (Spain)

Bartomeu Alorda, Jaume Segura Grup de Sistemes Electronics. Balearic Islands University Carretera de Valldemossa km 7.5. 07122 Palma de Mallorca (Spain)

pp. 120-125

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A fast error correction technique for matrix multiplication algorithms (Abstract)

C. Argyrides, Department of Computer Science, University of Bristol, United Kingdom

C. A. L. Lisboa, Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brasil

D. K. Pradhan, Department of Computer Science, University of Bristol, United Kingdom

L. Carro, Instituto de Informatica, PPGC, Universidade Federal do Rio Grande do Sul, Brasil

pp. 133-137

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Soft error detection and correction for FFT based convolution using different block lengths (Abstract)

Pedro Reviriego, Universidad Antonio de Nebriiia, Cl Pirineos, 55 E-28040 Madrid, Spain

Juan Antonio Maestro, Universidad Antonio de Nebriiia, Cl Pirineos, 55 E-28040 Madrid, Spain

Anne O'Donnell, University College Dublin, Belfield, Dublin 4, Ireland

Chris J. Bleakley, University College Dublin, Belfield, Dublin 4, Ireland

pp. 138-143

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In-depth analysis of digital circuits against soft errors for selective hardening (Abstract)

Mario Garcia-Valderas, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Marta Portela-Garcia, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Celia Lopez-Ongil, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Luis Entrena, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

pp. 144-149

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Briefing power/reliability optimization in embedded software design (Abstract)

Fabian Vargas, Electrical Engineering Dept., Catholic University - PUCRS, Av. Ipiranga, 6681., 90619-900 Porto Alegre - Brazil

Claudia A. Rocha, Electrical Engineering Dept., Catholic University - PUCRS, Av. Ipiranga, 6681., 90619-900 Porto Alegre - Brazil

Bernardo Pianta, Electrical Engineering Dept., Catholic University - PUCRS, Av. Ipiranga, 6681., 90619-900 Porto Alegre - Brazil

Marta Portela Garcia, Microelectronic Design and Applications, University Carlos III of Madrid, Av. Universidad, 30., 28911, Leganés, Spain

Celia Lopez Ongil, Microelectronic Design and Applications, University Carlos III of Madrid, Av. Universidad, 30., 28911, Leganés, Spain

Mario Garcia Valderas, Microelectronic Design and Applications, University Carlos III of Madrid, Av. Universidad, 30., 28911, Leganés, Spain

Luis Entrena, Microelectronic Design and Applications, University Carlos III of Madrid, Av. Universidad, 30., 28911, Leganés, Spain

pp. 185-186

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FPGA-based testing strategy for cryptographic chips: A case study on Elliptic Curve Processor for RFID tags (Abstract)

Junfeng Fan, Katholieke Universiteit Leuven, ESAT/SCD-COSIC, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium

Miroslav Knezevic, Katholieke Universiteit Leuven, ESAT/SCD-COSIC, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium

Dusko Karaklajic, Katholieke Universiteit Leuven, ESAT/SCD-COSIC, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium

Roel Maes, Katholieke Universiteit Leuven, ESAT/SCD-COSIC, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium

Vladimir Rozic, Katholieke Universiteit Leuven, ESAT/SCD-COSIC, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium

Lejla Batina, Katholieke Universiteit Leuven, ESAT/SCD-COSIC, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium

Ingrid Verbauwhede, Katholieke Universiteit Leuven, ESAT/SCD-COSIC, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium

pp. 189-191

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Error detection in addition chain based ECC Point Multiplication (Abstract)

S. Pontarelli, University of Rome ¿Tor Vergata¿, Via del Politecnico 1, 00191, ITALY

G.C. Cardarilli, University of Rome ¿Tor Vergata¿, Via del Politecnico 1, 00191, ITALY

M. Re, University of Rome ¿Tor Vergata¿, Via del Politecnico 1, 00191, ITALY

A. Salsano, University of Rome ¿Tor Vergata¿, Via del Politecnico 1, 00191, ITALY

pp. 192-194

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A fault tolerant journalized stack processor architecture (Abstract)

Abbas Ramazani, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

Mohsin Amin, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

Fabrice Monteiro, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

Camille Diou, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

Abbas Dandache, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

pp. 201-202

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Pseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers (Abstract)

Alejandro Jimenez-Horas, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Enrique San Millan, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Celia Lopez-Ongil, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Marta Portela-Garcia, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Mario Garcia-Valderas, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

Luis Entrena, Microelectronic Design and Applications Group, Electronic Technology Dept., Carlos III University of Madrid, Spain

pp. 203-205

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C-testable S-box implementation for secure advanced encryption standard (Abstract)

H. Rahaman, Department of Computer Science, University of Bristol, BS8 1UB, UK

J. Mathew, Department of Computer Science, University of Bristol, BS8 1UB, UK

A. Jabir, Dept. of Computer Science and Electronics, Oxford Brookes University, OX33 1HX, UK

D. K. Pradhan, Department of Computer Science, University of Bristol, BS8 1UB, UK

pp. 210-211

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A low-cost fault-tolerant technique for Carry Look-Ahead adder (Abstract)

Alireza Namazi, Dependable Systems Laboratory, Department of Computer Engineering, Sharif University of Technology, Azadi St., Tehran, IRAN

Yasser Sedaghat, Dependable Systems Laboratory, Department of Computer Engineering, Sharif University of Technology, Azadi St., Tehran, IRAN

Seyed Ghassem Miremadi, Dependable Systems Laboratory, Department of Computer Engineering, Sharif University of Technology, Azadi St., Tehran, IRAN

Alireza Ejlali, Dependable Systems Laboratory, Department of Computer Engineering, Sharif University of Technology, Azadi St., Tehran, IRAN

pp. 217-222

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Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies (Abstract)

J. Semiao, Univ. of Algarve, Instituto Superior de Engenharia, Campus da Penha, 8005-139 Faro, Portugal

J. Freijedo, Univ. of Vigo, Dept. de Tecnología Electrónica, Campus Universitario, 36310, Spain

J. Rodriguez-Andina, Univ. of Vigo, Dept. de Tecnología Electrónica, Campus Universitario, 36310, Spain

F. Vargas, PUCRS, Electrical Engineering Dept., Av. Ipiranga, 6681, 90619-900 Porto Alegre, Brazil

M. Santos, IST, Technical Univ. of Lisbon / INESC-ID Lisboa, R. Alves Redol, 9, 3o, 1000-029, Portugal

I. Teixeira, IST, Technical Univ. of Lisbon / INESC-ID Lisboa, R. Alves Redol, 9, 3o, 1000-029, Portugal

P. Teixeira, IST, Technical Univ. of Lisbon / INESC-ID Lisboa, R. Alves Redol, 9, 3o, 1000-029, Portugal

pp. 223-228

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Aggressively voltage overscaled adaptive RF systems using error control at the bit and symbol levels (Abstract)

J. Natarajan, Georgia Institute of Technology, Atlanta, USA

G. Kumar, Georgia Institute of Technology, Atlanta, USA

S. Sen, Georgia Institute of Technology, Atlanta, USA

M.M. Nisar, Georgia Institute of Technology, Atlanta, USA

D. Lee, Georgia Institute of Technology, Atlanta, USA

A. Chatterjee, Georgia Institute of Technology, Atlanta, USA

pp. 249-254

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An effective fast and small-area parallel-pipeline architecture for OTM-convolutional encoders (Abstract)

Houssein Jaber, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

Fabrice Monteiro, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

Abbas Dandache, LICM Laboratory, University Paul Verlaine - Metz, 7 rue Marconi, 57070, France

pp. 257-261

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Ultra low cost asynchronous handshake checker (Abstract)

Steffen Zeidler, IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

Marcus Ehrig, IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

Milos Krstic, IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

Michael Augustin, IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

Christoph Wolf, IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

Rolf Kraemer, IHP - Innovations for High Performance Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

pp. 262-268

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ATPG-based grading of strong fault-secureness (Abstract)

Marc Hunger, Institute of Electrical Engineering and Information Technology, University of Paderborn, Germany

Sybille Hellebrand, Institute of Electrical Engineering and Information Technology, University of Paderborn, Germany

Alejandro Czutro, Institute of Computer Science, University of Freiburg, Germany

Ilia Polian, Institute of Computer Science, University of Freiburg, Germany

Bernd Becker, Institute of Computer Science, University of Freiburg, Germany

pp. 269-274

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