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2009 15th IEEE International On-Line Testing Symposium
Concurrent checking with split-parity codes
Sesimbra-Lisbon, Portugal
June 24-June 26
ISBN: 978-1-4244-4596-7
Michael Richter, Potsdam University, 14482, Germany
Michael Goessel, Potsdam University, 14482, Germany
In this paper the design of error detection circuits for split-parity codes is investigated. In a split-parity code the linear parity bit is split into two nonlinear check bits. Split-parity codes, like parity codes, detect all odd errors with certainty; all even errors - which remain undetected by parity - are detected with a probability of 50%. It is shown that a large variety of split-parity codes exist which can be utilized for the optimization of error detection circuits with respect to area and error detection probability. It is demonstrated that split-parity codes are a cost-effective possibility to design error detection circuits.
Citation:
Michael Richter, Michael Goessel, "Concurrent checking with split-parity codes," iolts, pp.159-163, 2009 15th IEEE International On-Line Testing Symposium, 2009
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