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2009 15th IEEE International On-Line Testing Symposium
Exploiting embedded FPGA in on-line software-based test strategies for microprocessor cores
Sesimbra-Lisbon, Portugal
June 24-June 26
ISBN: 978-1-4244-4596-7
M. Grosso, Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
M. Sonza Reorda, Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
Strategies based on periodic Software-Based Self-Test (SBST) represent an effective and cost-efficient solution for the detection of faults in low-cost embedded systems that do not require immediate recognition of error conditions. Today's integrated systems increasingly often include hardwired microprocessor devices and Field-Programmable Gate Array (FPGA) cores. We propose to implement a test-support module in the on-chip FPGA to observe critical processor signals and hence increase the observation capabilities in non-concurrent software-based on-line test strategies. Preliminary results are shown on a case study based on the Leon3 processor.
Citation:
M. Grosso, M. Sonza Reorda, "Exploiting embedded FPGA in on-line software-based test strategies for microprocessor cores," iolts, pp.95-100, 2009 15th IEEE International On-Line Testing Symposium, 2009
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