June 24, 2009 to June 26, 2009
M. Grosso , Dipartimento di Automatica e Informatica, Politecnico di Torino, Italy
Strategies based on periodic Software-Based Self-Test (SBST) represent an effective and cost-efficient solution for the detection of faults in low-cost embedded systems that do not require immediate recognition of error conditions. Today's integrated systems increasingly often include hardwired microprocessor devices and Field-Programmable Gate Array (FPGA) cores. We propose to implement a test-support module in the on-chip FPGA to observe critical processor signals and hence increase the observation capabilities in non-concurrent software-based on-line test strategies. Preliminary results are shown on a case study based on the Leon3 processor.
M. Grosso, "Exploiting embedded FPGA in on-line software-based test strategies for microprocessor cores", IOLTS, 2009, 11th IEEE International On-Line Testing Symposium, 11th IEEE International On-Line Testing Symposium 2009, pp. 95-100, doi:10.1109/IOLTS.2009.5195989