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International On-Line Testing Symposium, 10th IEEE (IOLTS'04)
Funchal, Madeira Island, Portugal
July 12-July 14
ISBN: 0-7695-2180-0
Table of Contents
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Opening Session-Keynote Talk
Session 1: Timing and Transient Faults
D. Barros J?nior, PUCRS, Porto Alegre, Brazil
F. Vargas, PUCRS, Porto Alegre, Brazil
M. B. Santos, IST / INESC-ID Lisboa, Portugal
I. C. Teixeira, IST / INESC-ID Lisboa, Portugal
J. P. Teixeira, IST / INESC-ID Lisboa, Portugal
pp. 5
Yuvraj S. Dhillon, Georgia Institute of Technology, Atlanta, GA
Abdulkadir U. Diril, Georgia Institute of Technology, Atlanta, GA
Abhijit Chatterjee, Georgia Institute of Technology, Atlanta, GA
Adit D. Singh, Auburn University, Auburn, AL
pp. 11
Jos? Manuel Cazeaux, D.E.I.S. University of Bologna, Italy
Martin Oma?, D.E.I.S. University of Bologna, Italy
Cecilia Metra, D.E.I.S. University of Bologna, Italy
pp. 17
Session 2: Self Testing and Self Checking Circuits
V. Saposhnikov, Petersburg State Transport University
Vl. Saposhnikov, Petersburg State Transport University
A. Morozov, University of Potsdam
M. G?ssel, University of Potsdam
pp. 25
V. Ocheretnij, University of Potsdam, Germany
D. Marienfeld, University of Potsdam, Germany
E. S. Sogomonyan, University of Potsdam, Germany
M. G?ssel, University of Potsdam, Germany
pp. 31
Claudia Kretzschmar, Brandenburg University of Technology Cottbus, Germany
Christian Galke, Brandenburg University of Technology Cottbus, Germany
Heinrich T. Vierhaus, Brandenburg University of Technology Cottbus, Germany
pp. 37
Session 3: Checker and Voter Design
A. Rao, Southern Illinois University, USA
Th. Haniotakis, Southern Illinois University, USA
Y. Tsiatouhas, University of Ioannina, Greece
V. Kaky, Southern Illinois University, USA
pp. 52
Jos? Manuel Cazeaux, D.E.I.S. University of Bologna, Italy
Daniele Rossi, D.E.I.S. University of Bologna, Italy
Cecilia Metra, D.E.I.S. University of Bologna, Italy
pp. 58
Session 4: Concurrent Error Detection
Marcelo Negreiros, Universidade Federal do Rio Grande do Sul, Brazil
Luigi Carro, Universidade Federal do Rio Grande do Sul, Brazil
Altamiro A. Susin, Universidade Federal do Rio Grande do Sul, Brazil
pp. 73
L. Bolzani, Pontif?cia Universidade Cat?lica do Rio Grande do Sul (PUCRS), Brazil
M. Rebaudengo, Politecnico di Torino, Italy
M. Sonza Reorda, Politecnico di Torino, Italy
F. Vargas, Politecnico di Torino, Italy
M. Violante, Politecnico di Torino, Italy
pp. 79
Panel Session 1: On Emerging Field Reliability and Dependability Challenges
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Session 5: Microprocessor On-Line Testing
Eric F. Weglarz, University of Wisconsin - Madison
Kewal K. Saluja, University of Wisconsin - Madison
T. M. Mak, Intel Corporation, Santa Clara, CA
pp. 95
Hamid R. Zarandi, Sharif University of Technology
Seyed Ghassem Miremadi, Sharif University of Technology
Hamid Sarbazi-Azad, Sharif University of Technology; Institute for Studies in Theoretical Physics & Maths (IPM)
pp. 101
Session 6: On-Line Testing Evaluation
Mario Garc?a-Valderas, University Carlos III of Madrid, Spain
Celia L?pez-Ongil, University Carlos III of Madrid, Spain
Marta Portela-Garc?, University Carlos III of Madrid, Spain
Luis Entrena-Arrontes, University Carlos III of Madrid, Spain
pp. 109
P. Bernardi, Politecnico di Torino, Italy
M. Sonza Reorda, Politecnico di Torino, Italy
L. Sterpone, Politecnico di Torino, Italy
M. Violante, Politecnico di Torino, Italy
pp. 115
Y. Monnet, TIMA laboratory, France
M. Renaudin, TIMA laboratory, France
R. Leveugle, TIMA laboratory, France
pp. 121
Session 7: Error Correcting Code Based Fault Tolerance
A. M'Sir, LICM/CESIUM, University of Metz, France
F. Monteiro, LICM/CESIUM, University of Metz, France
A. Dandache, LICM/CESIUM, University of Metz, France
B. Lepley, LICM/CESIUM, University of Metz, France
pp. 129
D. Rossi, DEIS, University of Bologna, Italy
A. Muccio, DEIS, University of Bologna, Italy
A. K. Nieuwland, Philips Research Laboratories, The Netherlands
A. Katoch, Philips Research Laboratories, The Netherlands
C. Metra, DEIS, University of Bologna, Italy
pp. 135
G. C. Cardarilli, University of Rome "Tor Vergata", Italy
M. Ottavi, University of Rome "Tor Vergata", Italy
S. Pontarelli, University of Rome "Tor Vergata", Italy
M. Re, University of Rome "Tor Vergata", Italy
A. Salsano, University of Rome "Tor Vergata", Italy
pp. 141
Session 8: Reconfiguration, Repair, and Reuse for Fault Tolerance
Amit Agarwal, Purdue University, West Lafayette, IN
Bipul C. Paul, Purdue University, West Lafayette, IN
Kaushik Roy, Purdue University, West Lafayette, IN
pp. 149
C. Metra, DEIS-U. of Bologna
A. Ferrari, DEIS-U. of Bologna
M. Oma?, DEIS-U. of Bologna
A. Pagni, STMicroelectronics (Italy)
pp. 161
Session 9: Posters
E. B?, Robert Bosch Company, Stuttgart, Germany
E. Dilger, Robert Bosch Company, Stuttgart, Germany
M. B?, Robert Bosch Company, Stuttgart, Germany
pp. 175
Andr? K. Nieuwland, Philips Research Laboratories, The Netherlands
Patrick Gindner, University of Karlsruhe, Germany
pp. 177
R. Picos, Universitat de les Illes Balears, Spain
M. Roca, Universitat de les Illes Balears, Spain
E. Isern, Universitat de les Illes Balears, Spain
S. A. Bota, Universitat de les Illes Balears, Spain
E. Garc?, Universitat de les Illes Balears, Spain
pp. 179
C. A. L. Lisb?, Instituto de Inform?tica and Departamento de Engenharia El?trica - UFRGS
L. Carro, Instituto de Inform?tica and Departamento de Engenharia El?trica - UFRGS
pp. 180
Petr Fiser, Czech Technical University
Hana Kubatova, Czech Technical University
pp. 181
Debjyoti Ghosh, Purdue University, West Lafayette, Indiana
Swarup Bhunia, Purdue University, West Lafayette, Indiana
Kaushik Roy, Purdue University, West Lafayette, Indiana
pp. 182
Santosh Biswas, Indian Institute of Technology, Kharagpur, India
Siddhartha Mukhopadhyay, Indian Institute of Technology, Kharagpur, India
Amit Patra, Indian Institute of Technology, Kharagpur, India
pp. 184
Session 10: Built In Self Test
Patrick Girard, Universit? Montpellier II / CNRS, France
Olivier H?ron, Universit? Montpellier II / CNRS, France
Serge Pravossoudovitch, Universit? Montpellier II / CNRS, France
Michel Renovell, Universit? Montpellier II / CNRS, France
pp. 187
P. Karpodinis, University of Patras, Greece; Computer Technology Institute, Greece
D. Kagaris, Southern Illinois University, Carbondale
D. Nikolos, University of Patras, Greece; Computer Technology Institute, Greece
pp. 193
B. Alorda, Univ. de les Illes Balears
V. Canals, Univ. de les Illes Balears
I. de Pa?, Univ. de les Illes Balears
J. Segura, Univ. de les Illes Balears
pp. 199
Session 11: Safety and Security
Nikolaos G. Bartzoudis, Loughborough University, UK
Alexandros G. Fragkiadakis, Loughborough University, UK
David J. Parish, Loughborough University, UK
Jos? Luis N?, Loughborough University, UK
pp. 207
Elmar Dilger, Robert Bosch GmbH, Stuttgart, Germany
Roland Karrelmeyer, Robert Bosch GmbH, Stuttgart, Germany
Bernd Straube, Fraunhofer-Institut f?r Integrierte Schaltungen, Dresden, Germany
pp. 214
David H?ly, ST Microelectronics, France
Marie-Lise Flottes, LIRMM - UMII, France
Fr?d?ric Bancel, ST Microelectronics, France
Bruno Rouzeyre, LIRMM - UMII, France
Nicolas B?rard, ST Microelectronics, France
Michel Renovell, LIRMM - UMII, France
pp. 219
Session 12: Dependability Evaluation
B. Nicolescu, Ecole Polytechnique de Montr?al, Canada
Y. Savaria, Ecole Polytechnique de Montr?al, Canada
R. Velazco, TIMA Laboratory, France
pp. 233
Amir Rajabzadeh, Sharif University of Technology, Tehran, Iran
Seyed Ghassem Miremadi, Sharif University of Technology, Tehran, Iran
Mirzad Mohandespour, Sharif University of Technology, Tehran, Iran
pp. 239
Panel Session 2: Reliability Implications of Statistical Design
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