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1993 International Conference on Parallel Processing - ICPP'93 Vol1
Syracuse University
August 16-August 20
ISBN: 0-8493-8983-6
Table of Contents
Introduction
SESSION 1A: CACHE MEMORY
Anant Agarwal, Massachusetts Institute of Technology
David Kranz, Massachusetts Institute of Technology
Venkat Natarajan, Motorola Cambridge Research Center, Cambridge, MA
pp. 2-11
J.K. Peir, Computer & Communication Lab., Industr. Tech. Res. Inst., Taiwan ROC
K. So, IBM Advanced Workstation Systems, Austin, TX
J.H. Tang, IBM Advanced Workstation Systems, Austin, TX
pp. 12-19
Semi-unified Caches (Abstract)
Nathalie Drach, IRISA/INRIA Campus de Beaulieu, Cedex, France
Andre Seznec, IRISA/INRIA Campus de Beaulieu, Cedex, France
pp. 25-28
SESSION 2A: PROCESSOR AND COMMUNICATION ARCHITECTURE
Weijia Shang, University of Southwestern Louisiana
Benjamin W. Wah, University of Illinois, Urbana-Champaign
pp. 30-38
Danny Cohen, USC/Information Sciences Institute, Marina del Rey, CA
Gregory Finn, USC/Information Sciences Institute, Marina del Rey, CA
pp. 39-46
Terence M. Potter, University of Texas at Austin, Austin, TX
Hsiao-Chen Chung, University of Texas at Austin, Austin, TX
Chuan-lin Wu, University of Texas at Austin, Austin, TX
pp. 47-50
SESSION 3A: MEMORY
F. Cappello, LRI - UA 410 CNRS, Universite Paris Sud, Cedex, France
J-L Bechennec, LRI - UA 410 CNRS, Universite Paris Sud, Cedex, France
F. Delaplace, LRI - UA 410 CNRS, Universite Paris Sud, Cedex, France
C. Germain, LRI - UA 410 CNRS, Universite Paris Sud, Cedex, France
J-L Giavitto, LRI - UA 410 CNRS, Universite Paris Sud, Cedex, France
V. Neri, LRI - UA 410 CNRS, Universite Paris Sud, Cedex, France
D. Etiemble, LRI - UA 410 CNRS, Universite Paris Sud, Cedex, France
pp. 72-76
SESSION 4A: GRAPH-THEORETIC INTERCONNECTION STRUCIZTRES
CP. Ravikumar, Indian Institute of Technology-
A. Kuchlous, Indian Institute of Technology-
G. Manimaran, National Informatics Center, New Delhi, INDIA
pp. 83-90
Shahram Latifi, University of Nevada, Las Vegas
Marcelo Moraes de Azevedo, University of California, Irvine - Irvine, CA
Nader Bagherzadeh, University of California, Irvine - Irvine, CA
pp. 91-95
SESSION 5A: HYPERCUBE
Prasant Mohapatra, Pennsylvania State University
Chansu Yu, Pennsylvania State University
Chita R. Das, Pennsylvania State University
Jong Kim, POSTECH, Korea
pp. 110-117
SESSION 6A: ARCHITECTURE
O. M. Dighe, Louisiana State University, Baton Rouge, LA
R. Vaidyanathan, Louisiana State University, Baton Rouge, LA
S. Q. Zheng, Louisiana State University, Baton Rouge, LA
pp. 158-161
SESSION 7A: CACHE MEMORY
C. Eric Wu, IBM T. J. Watson Research Center, NY
Yarsun Hsu, IBM T. J. Watson Research Center, NY
Yew-Huey Liu, IBM T. J. Watson Research Center, NY
pp. 163-170
Luis Barriga, Royal Institute of Technology, Sweden
Rassul Ayani, Royal Institute of Technology, Sweden
pp. 171-174
0. Temam, University of Leiden, INRIA, IRISA
C. Fricker, University of Leiden, INRIA, IRISA
W. Jalby, University of Leiden, INRIA, IRISA
pp. 180-183
Yung-Chin Chen, MIPS Technologies, Inc., Silicon Graphics, Inc., Mountain View, CA
Alexander V. Veidenbaum, University of Illinois at Urbana-Champaign
pp. 184-187
SESSION 8A: PERFORMANCE EVALUATION
SESSION 9A: DISTRIBUTED SYSTEMS AND ARCHITECTURE
Matthew I. Frank, University of Wisconsin-Madison
Mary K. Vernon, University of Wisconsin-Madison
pp. 232-236
Umakishore Ramachandran, Georgia Institute of Technology, Atlanta, GA
Gautam Shah, Georgia Institute of Technology, Atlanta, GA
S. Ravikumar, Georgia Institute of Technology, Atlanta, GA
Jeyakumar Muthukumarasamy, Georgia Institute of Technology, Atlanta, GA
pp. 237-240
SESSION 10A: MEMORY AND DISKS
M. D. Durand, Bellcore, Morristown, NJ
T. Montaut, IRISA, Campus de Beaulieu, Cedex, France
L. Kervella, IRISA, Campus de Beaulieu, Cedex, France
W. Jalby, MASI, Universit6 de Versailles, Cedex, France
pp. 258-262
John A. Chandy, University of Illinois at Urbana-Champaign
Prithviraj Banerjee, University of Illinois at Urbana-Champaign
pp. 263-267
SESSION 11A: ROUTING ALGORITHMS AND RING, BUS STRUCTURES
M. Maresca, University of Genova, Italy
H. Li, University of Genova, Italy
P. Baglietto, University of Genova, Italy
pp. 282-289
S. Bataineh, Jordan University of Science and Technology
T. Hsiung, Jordan University of Science and Technology
T. G. Robertazzi, Jordan University of Science and Technology
pp. 290-293
Xiaola Lin, Michigan State University
Philip K. McKinley, Michigan State University
Lionel M. Ni, Michigan State University
pp. 294-297
SESSION 12A: GRAPH-THEORETIC INTERCONNECTION STRUCTURJ3S
W. J. Hsu, Nanyang Technological University, Singapore
M. J. Chung, Nanyang Technological University, Singapore
pp. 299-302
SESSION 13A: ARCHITECTURE
R. Ananthanarayanan, Georgia Institute of Technology
Mustaque Ahamad, Georgia Institute of Technology
Richard J. LeBlanc, Georgia Institute of Technology
pp. 324-331
Prince Kohli, Georgia Institute of Technology
Gil Neiger, Georgia Institute of Technology
Mustaque Ahamad, Georgia Institute of Technology
pp. 332-335
Kian-Lee TAN, National University of Singapore
Hongjun LU, National University of Singapore
pp. 345-348
Author Index
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