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24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04)
Development Methodology of ASIP Based on Java Byte Code Using HW/SW Co-Design System for Processor Design
Hachioji, Tokyo, Japan
March 23-March 24
ISBN: 0-7695-2087-1
Hideaki Yanagisawa, Toyo University
Minoru Uehara, Toyo University
Hideki Mori, Toyo University

To develop an ASIP (Application Specific Instruction set Processor), development of HW (hardware) and development of SWDE (software development environments) are required. Separate develops of HW and SWDE in a short time are difficult. So HW/SW co-design system is necessary rapid develop of ASIPs. We have developed C-DASH (C-like Design Automation Shell), which is a HW/SW co-design system for designing processors based on ISA (Instruction Set Architecture).

This paper describes the HW/SW co-design system C-DASH, along with a description of a java processor that directly executes Java byte code is given as an example.

Index Terms:
HW/SW Codesign system, ISA, ASIP, Java processor, C-DASH
Citation:
Hideaki Yanagisawa, Minoru Uehara, Hideki Mori, "Development Methodology of ASIP Based on Java Byte Code Using HW/SW Co-Design System for Processor Design," icdcsw, vol. 7, pp.831-837, 24th International Conference on Distributed Computing Systems Workshops - W7: EC (ICDCSW'04), 2004
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