The Community for Technology Leaders
RSS Icon
Subscribe
2012 IEEE 30th International Conference on Computer Design (ICCD) (2005)
San Jose, California
Oct. 2, 2005 to Oct. 5, 2005
ISBN: 0-7695-2451-6
TABLE OF CONTENTS
1.2 Interconnect Prediction and Optimization
9.1 Low Power Circuit Architecture (II)
Cover
Introduction
pp. xvi
Keynote Presentation
Professor David Patterson , University of California at Berkeley
pp. 3-6
1.1 Power and Thermal Consideration in Processor Design (I)
Peng Li , Department of EE, Texas A&M University
Yangdong Deng , Incentia Design Systems, Santa Clara, CA
Lawrence T. Pileggi , Department of ECE, Carnegie Mellon University
pp. 7-12
Hoang Q. Dao , Advanced Computer Systems Engineering Laboratory Department of Electrical and Computer Engineering, University of California, Davis, CA
Bart R. Zeydel , Advanced Computer Systems Engineering Laboratory Department of Electrical and Computer Engineering, University of California, Davis, CA
Vojin G. Oklobdija , Advanced Computer Systems Engineering Laboratory Department of Electrical and Computer Engineering, University of California, Davis, CA
pp. 13-16
Anahita Shayesteh , Computer Science Department, University of California, Los Angeles
Eren Kursun , Computer Science Department, University of California, Los Angeles
Tim Sherwood , Computer Science Department, University of California, Santa Barbara
Suleyman Sair , Department of Electrical and Computer Engineering, North Carolina State University
Glenn Reinman , Computer Science Department, University of California, Los Angeles
pp. 17-23
Kyeong-Jae Lee , Departments of Computer Science, and Electrical and Computer Engineering, University of Virginia
Kevin Skadron , Departments of Computer Science, and Electrical and Computer Engineering, University of Virginia
Wei Huang , Departments of Computer Science, and Electrical and Computer Engineering, University of Virginia
pp. 24-30
1.2 Interconnect Prediction and Optimization
Zion Shen , Cadence Design Systems 555 River Oaks Parkway, San Jose, CA
Chris C.N. Chu , Cadence Design Systems 555 River Oaks Parkway, San Jose, CA
Ying-Meng Li , Atoptech, Inc. 2700 Augustine Drive Santa Clara
pp. 38-44
Seraj Ahmad , Department of CS, Texas A&M University, College Station TX 77843
Nikhil Jayakumar , Department of EE, Texas A&M University, College Station TX 77843
Vijay Balasubramanian , Department of CS, Texas A&M University, College Station TX 77843
Edward Hursey , Department of ECE, University of Colorado, Boulder, CO 80303
Sunil P Khatri , Department of CS, Texas A&M University, College Station TX 77843
Rabi Mahapatra , Department of CS, Texas A&M University, College Station TX 77843
pp. 45-52
1.3 System-Level Architecture
Li Zhao , Department of Computer Science and Engineering, University of California, Riverside, CA
Ravi Iyer , Communications Technology Lab, Intel Corporation, Hillsboro, OR
Srihari Makineni , Communications Technology Lab, Intel Corporation, Hillsboro, OR
Laxmi Bhuyan , Department of Computer Science and Engineering, University of California, Riverside, CA
Don Newell , Communications Technology Lab, Intel Corporation, Hillsboro, OR
pp. 53-60
Mazen Kharbutli , Department of Electrical and Computer Engineering, North Carolina State University
Yan Solihin , Department of Electrical and Computer Engineering, North Carolina State University
pp. 61-68
Mehrdad Reshadi , Center for Embedded Computer Systems (CECS), University of California Irvine
Bita Gorjiara , Center for Embedded Computer Systems (CECS), University of California Irvine
Daniel Gajski , Center for Embedded Computer Systems (CECS), University of California Irvine
pp. 69-76
Panel Discussion
Rich Faris , Marketing Director RealIntent
Ken Larsen , Mentor Graphics
Harry Foster , Jasper DA
Stuart Swwan , Cadence Design Systems
pp. 77
2.1 Power aware System Design
Andi Nourrachmat , Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY
Sabino Salerno , Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY
Enrico Macii , Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY
Massimo Poncino , Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY
pp. 81-86
Martino Ruggiero , University of Bologna, DEIS, Viale Risorgimento, 2 - Bologna, Italy
Andrea Acquaviva , University of Urbino, STI, Piazza Repubblica, 13 - Urbino, Italy
Davide Bertozzi , University of Ferrara, via Saragat, 1 - Ferrara, Italy
Luca Benini , University of Bologna, DEIS, Viale Risorgimento, 2 - Bologna, Italy
pp. 87-93
Vasily G. Moshnyaga , Department of Electronics Engineering and Computer Science, Fukuoka University, Japan
Eiji Morikawa , Department of Electronics Engineering and Computer Science, Fukuoka University, Japan
pp. 94-97
K. Patel , Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY
E. Macii , Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY
M. Poncino , Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY
pp. 98-101
Bo-Cheng Charles Lai , EE Department, UCLA
Patrick Schaumont , ECE Department, Virginia Tech.
Wei Qin , ECE Department, Boston University MA
Ingrid Verbauwhede , EE Dept. UCLA, CA and ESAT, K.U.Leuven, BE
pp. 102-104
Nevine AbouGhazaleh , Department of Computer Science, University of Pittsburgh
Bruce Childers , Department of Computer Science, University of Pittsburgh
Daniel Mosse , Department of Computer Science, University of Pittsburgh
Rami Melhem , Department of Computer Science, University of Pittsburgh
pp. 105-110
2.2 Physical-Aware System-Level Analysis and Synthesis
Yuanfang Hu , Department of Compuqter Science and Engineering, University of California, San Diego, 9500 Gilman Dr., La Jolla, CA
Hongyu Chen , Department of Compuqter Science and Engineering, University of California, San Diego, 9500 Gilman Dr., La Jolla, CA
Yi Zhu , Department of Compuqter Science and Engineering, University of California, San Diego, 9500 Gilman Dr., La Jolla, CA
Andrew A. Chien , Department of Compuqter Science and Engineering, University of California, San Diego, 9500 Gilman Dr., La Jolla, CA
Chung-Kuan Cheng , Department of Compuqter Science and Engineering, University of California, San Diego, 9500 Gilman Dr., La Jolla, CA
pp. 111-118
Shrirang Yardi , Bradley Department of Electrical and Computer Engineering Virginia Tech, Blacksburg, VA, USA.
Karthik Channakeshava , Bradley Department of Electrical and Computer Engineering Virginia Tech, Blacksburg, VA, USA.
Michael S. Hsiao , Bradley Department of Electrical and Computer Engineering Virginia Tech, Blacksburg, VA, USA.
Thomas L. Martin , Bradley Department of Electrical and Computer Engineering Virginia Tech, Blacksburg, VA, USA.
Dong S. Ha , Bradley Department of Electrical and Computer Engineering Virginia Tech, Blacksburg, VA, USA.
pp. 119-126
Soheil Ghiasi , Department of Electrical and Computer Engineering University of California, Davis
pp. 127-129
Hang Li , Micron Technology Inc., San Jose, CA 95131
Pu Liu , Department of Electrical Engineering, University of California, Riverside, CA
Zhenyu Qi , Department of Electrical Engineering, University of California, Riverside, CA
Lingling Jin , Department of Computer Science and Engineering, University of California, Riverside, CA
Wei Wu , Department of Computer Science and Engineering, University of California, Riverside, CA
Sheldon X.-D. Tan , Department of Electrical Engineering, University of California, Riverside, CA
Jun Yang , Department of Computer Science and Engineering, University of California, Riverside, CA
pp. 130-136
2.3 SoC Test Methods
Anuja Sehgal , Department of Electrical & Computer Engineering Duke University, Durham, NC.
Sule Ozev , Department of Electrical & Computer Engineering Duke University, Durham, NC.
Krishnendu Chakrabarty , Department of Electrical & Computer Engineering Duke University, Durham, NC.
pp. 137-142
Gang Zeng , Graduate School of Science and Technology, Chiba University, Japan
Hideo Ito , Faculty of Engineering, Chiba University, Japan
pp. 143-146
Mango C.-T. Chao , Dept. of ECE, UC-Santa Barbara, CA
Seongmoon Wang , NEC Labs. America, Princeton, NJ
Srimat T. Chakradhar , NEC Labs. America, Princeton, NJ
Kwang-Ting Cheng , Dept. of ECE, UC-Santa Barbara, CA
pp. 147-152
Yung-Chieh Lin , Dept. of ECE, University of California, Santa Barbara, Santa Barbara, USA
Feng Lu , Dept. of ECE, University of California, Santa Barbara, Santa Barbara, USA
Kwang-Ting Cheng , Dept. of ECE, University of California, Santa Barbara, Santa Barbara, USA
pp. 153-156
Jheng-Syun Yang , Department of Electrical Engineering, National Tsing-Hua University, Taiwan
Shi-Yu Huang , Department of Electrical Engineering, National Tsing-Hua University, Taiwan
pp. 157-160
Fang Liu , Department of Electrical & Computer Engineering, Duke University
Sule Ozev , Department of Electrical & Computer Engineering, Duke University
pp. 161-170
3.1 Reliable Circuit Design
Song Peng , Computer Systems Laboratory, Cornell University, Ithaca, NY, USA
Rajit Manohar , Computer Systems Laboratory, Cornell University, Ithaca, NY, USA
pp. 171-179
Lei Wang , Dept. of Electrical and Computer Engineering University of Connecticut
pp. 179-184
Patrick Ndai , Dept. of ECE, Purdue University, West Lafayette, IN, USA
Amit Agarwal , Dept. of ECE, Purdue University, West Lafayette, IN, USA
Qikai Chen , Dept. of ECE, Purdue University, West Lafayette, IN, USA
Kaushik Roy , Dept. of ECE, Purdue University, West Lafayette, IN, USA
pp. 185-192
3.2 High Level Systhersis
E. M. Witte , Institute for Integrated Signal Processing Systems RWTH Aachen University, Aachen, Germany
A. Chattopadhyay , Institute for Integrated Signal Processing Systems RWTH Aachen University, Aachen, Germany
O. Schliebusch , Institute for Integrated Signal Processing Systems RWTH Aachen University, Aachen, Germany
D. Kammler , Institute for Integrated Signal Processing Systems RWTH Aachen University, Aachen, Germany
pp. 193-199
Koji Ohashi , School of Information Science,Japan Advanced Institute of Science and Technology
Mineo Kaneko , School of Information Science,Japan Advanced Institute of Science and Technology
pp. 200-205
N. Banerjee , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
A. Raychowdhury , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
S. Bhunia , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
H. Mahmoodi , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
K. Roy , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
pp. 206-214
3..3 Verification of SoCs with Datapaths and Software
Namrata Shekhar , Department of Electrical and Computer Engineering University of Utah, Salt Lake City, UT
Priyank Kalla , Department of Electrical and Computer Engineering University of Utah, Salt Lake City, UT
Sivaram Gopalakrishnan , Department of Electrical and Computer Engineering University of Utah, Salt Lake City, UT
Florian Enescu , Department of Mathematics and Statistics Georgia State University, Atlanta, GA
pp. 215-220
Marc Boule , McGill University,Montreal, Canada
Zeljko Zilic , McGill University,Montreal, Canada
pp. 221-228
I. Ugarte , Microelectronics Engineering Group. TEISA Department. ETSIIT. University of Cantabria
P. Sanchez , Microelectronics Engineering Group. TEISA Department. ETSIIT. University of Cantabria
pp. 229-231
Bhanu Pisupati , Indiana University Department of Computer Science
Geoffrey Brown , Indiana University Department of Computer Science
pp. 232-238
Keynote Address
4.1 Low Power Circuit Arhcitecture
Deepak S Vijayasarathi , Center for Integrated Circuits & Systems The University of Texas at Dallas Richardson, TX
Mehrdad Nourani , Center for Integrated Circuits & Systems The University of Texas at Dallas Richardson, TX
Mohammad J. Akhbarizadeh , Center for Integrated Circuits & Systems The University of Texas at Dallas Richardson, TX
Poras T. Balsara , Center for Integrated Circuits & Systems The University of Texas at Dallas Richardson, TX
pp. 243-248
Milena Vratonjic , Advanced Computer Systems Engineering Laboratory (ACSEL) University of California, Davis, CA
Bart R. Zeydel , Advanced Computer Systems Engineering Laboratory (ACSEL) University of California, Davis, CA
Vojin G. Oklobdzija , Advanced Computer Systems Engineering Laboratory (ACSEL) University of California, Davis, CA
pp. 249-252
Muhammad Khellah , ECE Dept., Northwestern University, Evanston, IL, USA
Maged Ghoneima , ECE Dept., Northwestern University, Evanston, IL, USA
James Tschanz , ECE Dept., Northwestern University, Evanston, IL, USA
Yibin Ye , ECE Dept., Northwestern University, Evanston, IL, USA
Nasser Kurd , Circuits Research
Javed Barkatullah , Circuits Research
Srikanth Nimmagadda , LTD-Group, Intel, Hillsboro, OR
Yehea Ismail , ECE Dept., Northwestern, University, Evanston, IL,
pp. 253-257
Tetsuya Yamaday , Hitachi, LTD, 1-280 Higashi-Koigajubo, kokubunji-shi, Tokyo, Japan
Masahide Abe , Renesas Technology Corp., 5-20-1, Josuihon-cho,Kodaira-shi, Tokyo Japan
Yusuke Nitta , Renesas Technology Corp., 5-20-1, Josuihon-cho,Kodaira-shi, Tokyo Japan
Kenji Oguray , Hitachi ULSI systems CO., Ltd., 3-1-1, Higashi-Koigajubo, kokubunji-shi, Tokyo, Japan
Manabu Kusaoke , Hitachi ULSI systems CO., Ltd., 3-1-1, Higashi-Koigajubo, kokubunji-shi, Tokyo, Japan
Makoto Ishikawa , Hitachi, LTD, 1-280 Higashi-Koigajubo, kokubunji-shi, Tokyo, Japan
Motokazu Ozawa , Hitachi, LTD, 1-280 Higashi-Koigajubo, kokubunji-shi, Tokyo, Japan
Kiwamu Tak ada , Hitachi ULSI systems CO., Ltd., 3-1-1, Higashi-Koigajubo, kokubunji-shi, Tokyo, Japan
Fumio Arakawa , Hitachi, LTD, 1-280 Higashi-Koigajubo, kokubunji-shi, Tokyo, Japan
Osamu Nishii , Renesas Technology Corp., 5-20-1, Josuihon-cho,Kodaira-shi, Tokyo Japan
T oshihiro Hattori , Renesas Technology Corp., 5-20-1, Josuihon-cho,Kodaira-shi, Tokyo Japan
pp. 258-266
4.2 Emerging Design Styles and Applications
Bradley R. Quinton , Dept. of Electrical and Computer Engineering, University of British Columbia, Canada
Mark R. Greenstreet , Dept. of Electrical and Computer Science, University of British Columbia, Canada
Steven J.E. Wilton , Dept. of Electrical and Computer Engineering, University of British Columbia, Canada
pp. 267-274
Aswin C Sankaranarayanan , Electrical and Computer Engineering Department, University of Maryland at College Park
Rama Chellappa , Electrical and Computer Engineering Department, University of Maryland at College Park
Ankur Srivastava , Electrical and Computer Engineering Department, University of Maryland at College Park
pp. 275-280
Wei Zhang , Department of Electrical Engineering, Princeton University, Princeton, NJ
Niraj K. Jha , Department of Electrical Engineering, Princeton University, Princeton, NJ
pp. 281-288
Li-Kai Chang , Department of Computer Science and Engineering, Tatung University Taipei, Taiwan
Fu-Chiung Cheng , Department of Computer Science and Engineering, Tatung University Taipei, Taiwan
pp. 289-296
4.3 Formal Verification - Form Hardware to Software (Invited)
Franco Ivanicic , NEC Laboratories America, 4 Independence Way, Princeton, NJ 08540
Ilya Shlyakhter , NEC Laboratories America, 4 Independence Way, Princeton, NJ 08540
Aarti Gupta , NEC Laboratories America, 4 Independence Way, Princeton, NJ 08540
Malay K. Ganai , NEC Laboratories America, 4 Independence Way, Princeton, NJ 08540
pp. 297-308
Mark A. Hillebrand , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Thomas In der Rieden , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Wolfgang J. Paul , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
pp. 309-316
Sven Beyer , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Peter Bohm , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Michael Gerke , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Mark Hillebrand , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Tom In der Rieden , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Steffen Knapp , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Dirk Leinenbach , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
Wolfgang J. Paul , Saarland University, Dept. of Computer Science, 66123 Saarbrucken, Germany
pp. 317-326
5.1 Cache Memory Architecture
Prateek Pujara , Dept of Electrical and Computer Engineering, Binghamton University Binghamton, NY
Aneesh Aggarwal , Dept of Electrical and Computer Engineering, Binghamton University Binghamton, NY
pp. 327-333
Jan-Willem van de Waerdt , Philips Semiconductors, San Jose, CA, USA
Stamatis Vassiliadis , Delft University of Technology Delft, The Netherlands
Jean-Paul van Itegem , Philips Semiconductors, San Jose, CA, USA
Hans van Antwerpen , Philips Semiconductors, San Jose, CA, USA
pp. 334-341
Luong D. Hung , Graduate School of Information Science and Technology, The University of Tokyo, Tokyo, Bunkyo, Hongo, Japan
Masahiro Goshima , Graduate School of Information Science and Technology, The University of Tokyo, Tokyo, Bunkyo, Hongo, Japan
Shuichi Sakai , Graduate School of Information Science and Technology, The University of Tokyo, Tokyo, Bunkyo, Hongo, Japan
pp. 342-350
5.2 Gate Timing abd Power Analysis
Soroush Abbaspour , Electrical Engineering Department, University of Southern California
Hanif Fatemi , Electrical Engineering Department, University of Southern California
Massoud Pedram , Electrical Engineering Department, University of Southern California
pp. 351-356
F.R. Schneider , Instituto de Inform?tica - UFRGS CEP - Caixa Postal Porto Alegre - RS - Brasil
R.P. Ribas , Instituto de Inform?tica - UFRGS CEP - Caixa Postal Porto Alegre - RS - Brasil
S.S. Sapatnekar , Department of Electrical and Computer Engineering 200 Union Street SE, University of Minnesota, MN
A.I. Reis , Department of Electrical and Computer Engineering 200 Union Street SE, University of Minnesota, MN
pp. 357-362
Peng Li , Department of Electrical Engineering Texas A%M University, College Station, TX
Emrah Acar , IBM Austin Research Lab Austin, TX
pp. 363-365
Fei Hu , Dept. of ECE, Auburn University, Auburn, AL
Vishwani D. Agrawal , Dept. of ECE, Auburn University, Auburn, AL
pp. 366-372
5.3 Perform Modeling
Tipp Moseley , Department of Computer Science University of Colorado Boulder, CO
Dirk Grunwald , Department of Computer Science University of Colorado Boulder, CO
Joshua L. Kihm , Department of Electrical and Computer Engineering, University of Colorado Boulder, CO
Daniel A. Connors , Department of Electrical and Computer Engineering, University of Colorado Boulder, CO
pp. 373-380
Carl S. Lebsack , Department of Electrical and Computer Engineering Iowa State University Ames, IA
J. Morris Chang , Department of Electrical and Computer Engineering Iowa State University Ames, IA
pp. 381-386
Khaled Z. Ibrahim , Department of Electrical Engineering, Suez Canal University, Egypt.
pp. 387-392
Yue Luo , Department of Electrical and Comuputer Engineering, University of Texas at Austin
Lizy K. John , Department of Electrical and Comuputer Engineering, University of Texas at Austin
pp. 393-398
6.1 Low Voltage Design
Nikhil Jayakumar , Department of Electrical Engineering, Texas A%M University, College Station, TX
Sunil P. Khatri , Department of Electrical Engineering, Texas A%M University, College Station, TX
pp. 399-404
Jinhui Chen , Electrical Engineering Dept., Arizona State University, Tempe, AZ
Lawrence T. Clark , Electrical Engineering Dept., Arizona State University, Tempe, AZ
Yu Cao , Electrical Engineering Dept., Arizona State University, Tempe, AZ
pp. 405-410
Sheng-Chih Lin , Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA
Navin Srivastava , Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA
Kaustav Banerjee , Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA
pp. 411-416
Arijit Raychowdhury , Dept. of ECE, Purdue University, West Lafayette, IN
Saibal Mukhopadhyay , Dept. of ECE, Purdue University, West Lafayette, IN
Kaushik Roy , Dept. of ECE, Purdue University, West Lafayette, IN
pp. 417-424
6.2 Physical-Aware Circuit Design
Azadeh Davoodi , University of Maryland, College Park, MD
Ankur Srivastava , University of Maryland, College Park, MD
pp. 425-430
Valmiki Mukherjee , Computer Science and Engineering University of North Texas Denton, TX
Saraju P. Mohanty , Computer Science and Engineering University of North Texas Denton, TX
Elias Kougianos , Engineering Technology University of North Texas Denton, TX
pp. 431-437
Andrew B. Kahng , Computer Science and Engineering Dept. Univ. of California, San Diego
Bao Liu , Computer Science and Engineering Dept. Univ. of California, San Diego
Qinke Wang , Computer Science and Engineering Dept. Univ. of California, San Diego
pp. 437-443
Anuradha Agarwal , Department of ECECS, University of Cincinnati, Cincinnati, OH
Ranga Vemuri , Department of ECECS, University of Cincinnati, Cincinnati, OH
pp. 444-452
6.3 Verification and Test for Sequential Circuits and Delay Fault Models
Manan Syal , Intel Corporation, Hillsboro, Oregon, US
Rajat Arora , Cadence Design Systems, San Jose, California, US
Michael S. Hsiao , Department of ECE, Virginia Tech Blacksburg, Virginia, US
pp. 453-460
Qiang Qiang , Electrical Engineering and Computer Science, Case Western Reserve University Cleveland, Ohio, USA
Qiang, Chia-Lun Chang , Electrical Engineering and Computer Science, Case Western Reserve University Cleveland, Ohio, USA
Daniel G. Saab , Electrical Engineering and Computer Science, Case Western Reserve University Cleveland, Ohio, USA
Jacob A. Abraham , Computer Engineering Research CenterThe University of Texas at Austin Austin, TX, USA
pp. 461-463
Maria K. Michael , ECE Dept.,University of Cyprus
Kyriakos Christou , ECE Dept.,University of Cyprus
Spyros Tragoudas , Southern Illinois University
pp. 464-467
M.M. Vaseekar Kumar , Department of Electrical and Computer Engineering, Southern Illinois University Carbondale, IL
S. Tragoudas , Department of Electrical and Computer Engineering, Southern Illinois University Carbondale, IL
pp. 468-470
N. Devtaprasanna , Department of ECE, University of Iowa, Iowa City, IA
A. Gunda , LSI Logic Corp., Milpitas, CA
P. Krishnamurthy , LSI Logic Corp., Milpitas, CA 95035
S.M. Reddy , Department of ECE, University of Iowa, Iowa City, IA
I. Pomeranz , School of ECE, Purdue University, West Lafayette, IN
pp. 471-474
Laung-Terng Wang , SynTest Technologies, Inc.
Xiaoqing Wen , Kyushu Institute of Technology, Japan
Po-Ching Hsu , SynTest Technologies, Inc., Taiwan
Shianling Wu , SynTest Technologies, Inc.
Jonhson Guo , SynTest Technologies, Inc., China
pp. 475-478
Liyang Lai , University of Illinois at Urbana-Champaign, Urbana, IL
Janak H. Patel , University of Illinois at Urbana-Champaign, Urbana, IL
Thomas Rinderknecht , Mentor Graphics Corp. Wilsonville, OR
Wu-Tung Cheng , Mentor Graphics Corp. Wilsonville, OR
pp. 479-484
7.1 New Memory Technologies (Invited)
Rick Bailey , Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO USA
Glen Fox , Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO USA
Jarrod Eliason , Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO , USA
Marty Depner , Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO , USA
Daesig Kim , Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO , USA
Edwin Jabillo , Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO , USA
John Groat , Ramtron International Corporation, 1850 Ramtron Drive, Colorado Springs, CO
John Walbert , Texas Instruments, 13560 N. Central Expy, MS
Scott Summerfelt , Texas Instruments, 13560 N. Central Expy, MS
K.R. Udayakumar , Texas Instruments, 13560 N. Central Expy, MS
John Rodriquez , Texas Instruments, 13560 N. Central Expy, MS
Keith Remack , Texas Instruments, 13560 N. Central Expy, MS
K. Boku , Texas Instruments, 13560 N. Central Expy, MS
John Gertas , Texas Instruments, 13560 N. Central Expy, MS-3736, Dallas, TX
pp. 485
8.1 High Performance Designs
Hua Li , Department of Mathematics and Computer Science, University of Lethbridge
Jianzhou Li , Department of Mathematics and Computer Science, University of Lethbridge
pp. 491-496
Hongyu Chen , University of California, San Diego 9500 Gilman Dr., La Jolla, CA
Rui Shi , University of California, San Diego 9500 Gilman Dr., La Jolla, CA
Chung-Kuan Cheng , University of California, San Diego 9500 Gilman Dr., La Jolla, CA
David M. Harris , Harvey Mudd College, Claremont, CA 91711
pp. 497-502
Kazunori Shimizu , Graduate School of Information, Production and Systems, Waseda University
Tatsuyuki Ishikawa , Graduate School of Information, Production and Systems, Waseda University
Takeshi Ikenaga , Graduate School of Information, Production and Systems, Waseda University
Satoshi Goto , Graduate School of Information, Production and Systems, Waseda University
Nozomu Togawa , Dept. of Computer Science, Waseda University, Hibikino, Wakamatsuku, Kitakyushu-shi,Japan
pp. 503-510
Anatoly I. Grushin , Moscow Design center, Intel Corporation, Russia
pp. 511-518
8.2 Future VLSI Technologies and Their Impact
Yuh-Fang Tsai , Department of Computer Science and Engineering, Penn State University
Yuan Xie , Department of Computer Science and Engineering, Penn State University
N. Vijaykrishnan , Department of Computer Science and Engineering, Penn State University
Mary Jane Irwin , Department of Computer Science and Engineering, Penn State University
pp. 519-524
Kiran Puttaswamy , Georgia Institute of Technology School of Electrical and Computer Engineering
Gabriel H. Loh , College of Computing
pp. 525-532
Wenjing Rao , UC San Diego, CSE Department
Alex Orailoglu , UC San Diego, CSE Department
Ramesh Karri , Polytechnic University, ECE Department
pp. 533-542
8.3 Architecture for Verifiability (Invited)
Milo M. K. Martin , Department of Computer and Information Science University of Pennsylvania
pp. 543-449
Todd Austin , The University of Michigan,Beal Ave, Ann Arbor, MI
Valeria Bertacco , The University of Michigan,Beal Ave, Ann Arbor, MI
pp. 550-558
9.1 Low Power Circuit Architecture (II)
Maryam Ashouei , Georgia Institute of Technology, Atlanta, GA
Abhijit Chatterjee , Georgia Institute of Technology, Atlanta, GA
Adit D. Singh , Auburn University, Auburn, AL
Vivek De , Intel Corporation, Hillsboro, OR
pp. 567-573
J.B. Kuang , IBM Austin Research Laboratory, Austin, TX
H.C. Ngo , IBM Austin Research Laboratory, Austin, TX
K.J. Nowka , IBM Austin Research Laboratory, Austin, TX
J.C. Law , IBM Austin Research Laboratory, Austin, TX
R.V. Joshi , IBM Austin Research Laboratory, Austin, TX
pp. 574-584
9.3 Formal Verification Methods
Anubhav Gupta , Carnegie Mellon University, Pittsburgh
Edmund Clarke , Carnegie Mellon University, Pittsburgh
pp. 591-598
Nikhil Kikkeri , Southern Methodist University, Computer Science and Engineering Dallas, TX
Peter-Michael Seidel , Southern Methodist University, Computer Science and Engineering Dallas, TX
pp. 599-602
Nathaniel Ayewah , Southern Methodist University, Computer Science and Engineering, Dallas, TX
Nikhil Kikkeri , Southern Methodist University, Computer Science and Engineering, Dallas, TX
Peter-Michael Seidel , Southern Methodist University, Computer Science and Engineering, Dallas, TX
pp. 603-608
10.1 Power and Thermal Consideration in Processor Design (II)
Won-Ho Park , Electrical and Computer Engineering, University of Toronto
Andreas Moshovos , Electrical and Computer Engineering, University of Toronto
Babak Falsafi , Electrical and Computer Engineering, Carnegie Mellon University
pp. 609-616
Fernando Castro , University Complutense of Madrid
Daniel Chaver , University Complutense of Madrid
Luis Pinuel , University Complutense of Madrid
Manuel Prieto , University Complutense of Madrid
Francisco Tirado , University Complutense of Madrid
Michael Huang , University of Rochester
pp. 617-624
Johnsy K. John , Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ
Jie S. Hu , Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ
Sotirios G. Ziavras , Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ
pp. 625-630
Dinesh C. Suresh , Department of Computer Science and Engineering, University of California, Santa Barbara
Banit Agrawal , Department of Computer Science and Engineering, University of California, Santa Barbara
Walid A. Najjar , Department of Computer Science and Engineering, University of California, Riverside
Jun Yang , Department of Computer Science and Engineering, University of California, Riverside
pp. 631-633
Siva Velusamy , Departments of Computer Science and Electrical and Computer Engineering University of Virginia.
Wei Huang , Departments of Computer Science and Electrical and Computer Engineering University of Virginia.
John Lach , Departments of Computer Science and Electrical and Computer Engineering University of Virginia.
Mircea Stan , Departments of Computer Science and Electrical and Computer Engineering University of Virginia.
Kevin Skadron , Departments of Computer Science and Electrical and Computer Engineering University of Virginia.
pp. 634-640
10.2 Instruction Issue, Scheduling and Prediction
Yongxiang Liu , Computer Science Department, University of California, Los Angeles
Gokhan Memik , Department of Electrical and Computer Engineering, Northwestern University
Glenn Reinman , Department of Electrical and Computer Engineering, Northwestern University
pp. 641-646
Marco A. Ram?rez , Computer Architecture Department U.P.C. Spain
Adrian Cristal , Computer Architecture Department U.P.C. Spain
Mateo Valero , Computer Architecture Department U.P.C. Spain
Alexander V. Veidenbaum , Dep. of Computer Science, University of California Irvine
Luis Villa , Mexican Petroleum Institute
pp. 647-653
Joseph J. Sharkey , Department of Computer Science, State University of New York at Binghamton
Kanad Ghose , Department of Computer Science, State University of New York at Binghamton
Dmitry V. Ponomarev , Department of Computer Science, State University of New York at Binghamton
Oguz Ergin , Intel Barcelona Research Center
pp. 654-661
Rania Mameesh , Deparmentt of Electrical and Computer Engineering, University of Maryland
Manoh Franklin , Deparmentt of Electrical and Computer Engineering, University of Maryland
pp. 662-665
Stefan Bieschewski , Departament d?Arquitectura de Computadors, Universitat Polit?cnica de Catalunya, Barcelona, Spain
Joan-Manuel Parcerisa , Departament d?Arquitectura de Computadors, Universitat Polit?cnica de Catalunya, Barcelona, Spain
Antonio Gonz?lez , Intel Barcelona Research Center, Intel Labs, Universitat Polit?cnica de Catalunya Barcelona, Spain
pp. 666-670
11.1 Circuit Consideration in Process Design
Xizhen Xu , Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark, NJ, USA
Sotirios G. Ziavras , Department of Electrical and Computer Engineering New Jersey Institute of Technology Newark, NJ, USA
pp. 671-676
Sri Hari Krishna Narayanan , Department of CSE, The Pennsylvania State University
Guilin Chen , Department of CSE, The Pennsylvania State University
Mahmut x Mahmut Kandemir, , Department of CSE, The Pennsylvania State University
Yuan Xie , Department of CSE, The Pennsylvania State University
pp. 677-682
Brock LaMeres , Department of ECE, University of Colorado, Boulder, CO
Sunil P Khatri , Department of EE, Texas A&M University, College Station TX
pp. 683-688
W.-L. Hung , Department of CSE, The Pennsylvania State University, University Park, PA
G. M. Link , Department of CSE, The Pennsylvania State University, University Park, PA
Yuan Xie , Department of CSE, The Pennsylvania State University, University Park, PA
N. Vijaykrishnan , Department of CSE, The Pennsylvania State University, University Park, PA
N. Dhanwad , IBM EDA Laboratory, Hopewell Junction, NY
J. Conner , Department of CSE, The Pennsylvania State University, University Park, PA
pp. 689-696
11.2 Logic Optimization
Nathan Kitchen , University of California at Berkeley, CA, USA
Andreas Kuehlmann , Cadence Berkeley Labs, Berkeley, CA, USA
pp. 697-702
Luis A. Plana , School of Computer Science, The University of Manchester
Sam Taylor , School of Computer Science, The University of Manchester
Doug Edwards , School of Computer Science, The University of Manchester
pp. 703-710
Yung-Chih Chen , Department of Computer Science, National Tsing Hua University, HsingChu, Taiwan
Chun-Yao Wang , Department of Computer Science, National Tsing Hua University, HsingChu, Taiwan
pp. 711-716
Author Index
Author Index (PDF)
pp. 717
403 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool