|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
 Digg  Furl  Spurl  Blink  Simpy  Google  Del.icio.us  Y!MyWeb | ||
| Search | ||
| ||
2004 IEEE International Conference on Computer Design (ICCD'04)
An Infrastructure IP for On-Chip Clock Jitter Measurement
San Jose, CA
October 11-October 13
ISBN: 0-7695-2231-9
| ASCII Text | x | ||
| Jui-Jer Huang, Jiun-Lang Huang, "An Infrastructure IP for On-Chip Clock Jitter Measurement," 2012 IEEE 30th International Conference on Computer Design (ICCD), pp. 186-191, 2004 IEEE International Conference on Computer Design (ICCD'04), 2004. | |||
| BibTex | x | ||
| @article{ 10.1109/ICCD.2004.1347920, author = {Jui-Jer Huang and Jiun-Lang Huang}, title = {An Infrastructure IP for On-Chip Clock Jitter Measurement}, journal ={2012 IEEE 30th International Conference on Computer Design (ICCD)}, volume = {0}, year = {2004}, issn = {1063-6404}, pages = {186-191}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2004.1347920}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - 2012 IEEE 30th International Conference on Computer Design (ICCD) TI - An Infrastructure IP for On-Chip Clock Jitter Measurement SN - 1063-6404 SP186 EP191 A1 - Jui-Jer Huang, A1 - Jiun-Lang Huang, PY - 2004 KW - null VL - 0 JA - 2012 IEEE 30th International Conference on Computer Design (ICCD) ER - | |||
In this paper, we present an infrastructure IP core to facilitate on-chip clock jitter measurement. In the proposed approach, the clock signal under test is delayed by two different delay values and the probabilities it leads the two delayed versions are measured. The RMS period jitter value can then be derived from the probabilities and the delay difference. Both behavior and circuit simulations are performed to validate the proposed technique and analyze the design tradeoffs, and a prototype chip has been designed for further validation.
Citation:
Jui-Jer Huang, Jiun-Lang Huang, "An Infrastructure IP for On-Chip Clock Jitter Measurement," iccd, pp.186-191, 2004 IEEE International Conference on Computer Design (ICCD'04), 2004
Usage of this product signifies your acceptance of the Terms of Use.