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2012 IEEE 30th International Conference on Computer Design (ICCD) (2003)
San Jose, California
Oct. 13, 2003 to Oct. 15, 2003
ISBN: 0-7695-2025-1
TABLE OF CONTENTS
Welcome (PDF)
pp. xiii
Keynotes
Mark Horowitz , Stanford University
pp. xx
Ted Vucurevich , Cadence Design Systems, Inc.
pp. xxii
Session 1.1 Energy Efficiency
Jaume Abella , Universitat Polit?cnica de Catalunya, Barcelona (Spain)
pp. 8
Jaume Abella , Universitat Polit?cnica de Catalunya, Barcelona (Spain)
pp. 14
Session 1.2 Timing Verification
Hao Zheng , IBM Microelectronics in Burlington, VT
Chris J. Myers , University of Utah, Salt Lake City
David Walter , University of Utah, Salt Lake City
Scott Little , University of Utah, Salt Lake City
Tomohiro Yoneda , National Institute of Informatics in Tokyo, Japan.
pp. 28
Marong Phadoongsidhi , University of Wisconsin - Madison
Kewal K. Saluja , University of Wisconsin - Madison
pp. 42
Edmund M. Clarke , Carnegie Mellon University
Daniel Kroening , Carnegie Mellon University
Karen Yorav , Carnegie Mellon University
pp. 48
Session 1.3 Electrical Analysis for System LSI
S. Bohidar , Brown University
R. Iris Bahar , Brown University
H.-Y. Song , Brown University
pp. 70
Session 2.1 Power Optimization
Ken Doniger , LSI Logic Corporation
William Loh , LSI Logic Corporation
Dechang Sun , Advance Custom Memory Group, AMINN
Rick Stephani , Advance Custom Memory Group, AMINN
Gordon Priebe , Advance Custom Memory Group, AMINN
pp. 84
Afshin Abdollahi , University of Southern California
Massoud Pedarm , University of Southern California
Farzan Fallah , Fujitsu Labs of America
Indradeep Ghosh , Fujitsu Labs of America
pp. 90
Hiroaki Suzuki , Purdue University, West Lafayette
Woopyo Jeong , Purdue University, West Lafayette
Kaushik Roy , Purdue University, West Lafayette
pp. 103
Nestoras Tzartzanis , Fujitsu Laboratories of America
William W. Walker , Fujitsu Laboratories of America
pp. 107
Session 2.2 Invited Session: Gene Chip Design
Embedded Tutorial
Ion I. Mandoiu , University of Connecticut
Andrew B. Kahng , University of California at San Diego
Xu Xu , University of California at San Diego
Alex Z. Zelikovsky , Georgia State University
pp. 116
Session 2.3 System Level Design
Nattawut Thepayasuwan , State University of New York at Stony Brook
Vaishali Damle , State University of New York at Stony Brook
Alex Doboli , State University of New York at Stony Brook
pp. 126
Vikas Chandra , Carnegie Mellon University, Pittsburgh, PA
Gary Carpenter , IBM Austin Research Lab
Jeff Burns , IBM Austin Research Lab
pp. 134
Sumit Gupta , University of California at Irvine
Nikil Dutt , University of California at Irvine
Rajesh Gupta , University of California at San Diego
Alex Nicolau , University of California at Irvine
pp. 140
Alessandro Pinto , University of California at Berkeley
Luca P. Carloni , University of California at Berkeley
Alberto L. Sangiovanni-Vincentelli , University of California at Berkeley
pp. 146
Mehrdad Reshadi , University of California, Irvine
Nikil Dutt , University of California, Irvine
pp. 151
Session 3.1 Systems Performance
Thomas Slabach , University of Notre Dame
Branden Moore , University of Notre Dame
pp. 156
Vincent Ajay Singh , The University of Texas at Austin
Stephen W. Keckler , The University of Texas at Austin
Doug Burger , The University of Texas at Austin
pp. 170
Session 3.2 Micro Processor Test & Diagnosis
Dilip Bhavsar , Intel Corporation, Shrewsbury, MA
Vijay Bettada , Intel Corporation, Shrewsbury, MA
Richard Davies , Intel Corporation, Shrewsbury, MA
pp. 180
Zhiyuan Wang , University of California, Santa Barbara
Malgorzata Marek-Sadowska , University of California, Santa Barbara
Kun-Han Tsai , Mentor Graphics Corporation, Wilsonville, OR
Janusz Rajski , Mentor Graphics Corporation, Wilsonville, OR
pp. 198
Session 3.3 Physical Design
Hiroaki Komatsu , Fujitsu Limited, Japan
Yoshiyasu Tanamura , Fujitsu Limited, Japan
Ryoichi Yamashita , Fujitsu Limited, Japan
Hiroyuki Sugiyama , Fujitsu Limited, Japan
Noriyuki Ito , Fujitsu Limited, Japan
Hirofumi Hamamura , Fujitsu Limited, Japan
pp. 204
Yangdong (Steven) Deng , Carnegie Mellon University, Pittsburgh, PA
Wojciech Maly , Carnegie Mellon University, Pittsburgh, PA
pp. 211
Bo-Kyung Choi , University of California, Los Angeles
Huaiyu Xu , University of California, Los Angeles
Maogang Wang , Cadence Design Systems, San Jose, CA
Majid Sarrafzadeh , University of California, Los Angeles
pp. 218
Session 4.1 Performance Optimization
Guy Even , Tel-Aviv University
Peter-M. Seidel , Southern Methodist University
pp. 240
Session 4.2 Clock & Signal Distribution
Steven C. Chan , Columbia University, New York, NY
Phillip J. Restle , IBM T.J Watson Research Center, NY
pp. 248
Ganesh Balamurugan , University of Illinois at Urbana-Champaign, Urbana, IL
Naresh Shanbhag , University of Illinois at Urbana-Champaign, Urbana, IL
pp. 254
Daniel Eckerbert , Chalmers University of Technology, Sweden
Lars "J." Svensson , Chalmers University of Technology, Sweden
Per Larsson-Edefors , Chalmers University of Technology, Sweden
pp. 261
Kanak Agarwal , University of Michigan, Ann Arbor
Shidhartha Das , University of Michigan, Ann Arbor
Dennis Sylvester , University of Michigan, Ann Arbor
pp. 264
Session 4.3 Performance and Power-Driven Physical Design
Nataraj Akkiraju , Intel Corporation, Santa Clara, CA
Mosur Mohan , Intel Corporation, Hilsboro, OR
pp. 270
Rishi Chaturvedi , Texas A&M University, College Station
Jiang Hu , Texas A&M University, College Station
pp. 282
Session 5.1 Instruction Execution
Shih-Chang Lai , SiS Corporation, Hsinchu, Taiwan
pp. 290
Sriram Nadathur , Iowa State University, Ames
Akhilesh Tyagi , Iowa State University, Ames
pp. 299
Chin-Chi Chang , National Chiao Tung University
Chen-Chia Lee , National Chiao Tung University
Tay-Jyi Lin , National Chiao Tung University
pp. 307
Mohamed Zahran , University of Maryland, College Park
pp. 313
Session 5.2 Invited Session: Test Compression Technology
Bernd Koenemann , Cadence Design Systems, Inc., San Jose, CA
pp. 320
Subhasish Mitra , Intel Corporation, Sacramento, CA
Kee Sup Kim , Intel Corporation, Sacramento, CA
pp. 326
Session 5.3 Physical Design for Regular Fabrics and FPGA's
Aiqun Cao , School of Electrical and Purdue University
pp. 338
Parivallal Kannan , University of Texas at Dallas
Dinesh Bhatia , University of Texas at Dallas
pp. 344
Hasan Arslan , University of Illinois-Chicago
Shantanu Dutt , University of Illinois-Chicago
pp. 350
Session 6.1 Array Design Optimization
M. Kandemir , The Pennsylvania State University
A. Sivasubramaniam , The Pennsylvania State University
M. J. Irwin , The Pennsylvania State University
N. Vijaykrishnan , The Pennsylvania State University
pp. 358
Gurhan Kucuk , State University of New York, Binghamton
Dmitry Ponomarev , State University of New York, Binghamton
Kanad Ghose , State University of New York, Binghamton
pp. 364
Peter Petrov , University of California at San Diego
Alex Orailoglu , University of California at San Diego
pp. 371
Jos? Gonz?lez , Universitat Polit?cnica de Catalunya
pp. 375
Session 6.2 Test Compaction
Petros Drineas , Rensselaer Polytechnic Institute
pp. 380
Yasumi Doi , Kyushu Institute of Technology
Lei Li , Duke University
Krishnendu Chakrabarty , Duke University
pp. 387
Irith Pomeranz , Purdue University
Sudhakar M. Reddy , University of Iowa
pp. 393
Shin-ya Kobayashi , Ehime University
Yuzo Takamatsu , Ehime University
Seiji Kajihara , Kyusyu Institute of Technology
Irith Pomeranz , Purdue University
pp. 397
Session 6.3 Invited Session: Techniques for Synthesizing into Fabrics
Richard Ray , IBM Corporation
Robert Devins , IBM Corporation
Mark Kautzman , IBM Corporation
Michael Hale , IBM Corporation
C. Ross Ogilvie , IBM Corporation
Bob Lynch , IBM Corporation
Santosh Gaur , IBM Corporation
pp. 402
Behrooz Zahiri , Magma Design Automation
pp. 404
Session 7.1 Hardware Partitioning
Dongku Kang , Purdue University
Mark C. Johnson , Purdue University
Kaushik Roy , Purdue University
pp. 412
Session 7.2 Energy-Aware Design and Application
N. Ranganathan , University of South Florida, Tampa
Saraju P. Mohanty , University of South Florida, Tampa
pp. 441
Farhad Ghasemi-Tari , Univ. of Southern California, Los Angeles
Peng Rong , Univ. of Southern California, Los Angeles
Massoud Pedram , Univ. of Southern California, Los Angeles
pp. 444
Session 7.3 Invited Session: High-Speed Design Issues and Test Challenges
William J. Dally , Stanford University; Velio Communications, Inc.
Ramin Farjad-Rad , Velio Communications, Inc.
Hiok-Tiaq Ng , Velio Communications, Inc.
M.-J. Edward Lee , Velio Communications, Inc.
John Edmondson , Velio Communications, Inc.
John Poulton , Velio Communications, Inc.
pp. 454
S. Seetharaman , Intel Corporation
K.W. Glass , Intel Corporation
C. Bil , Intel Corporation
H.V. Duong , Intel Corporation
K. Kiziloglu , Intel Corporation
pp. 462
Mike Li , Wavecrest Corporation
Jan Wilstrup , Wavecrest Corporation
pp. 467
Session 8.1 Efficiency and Reliability
Jaeyu Seo , SAMSUNG Electronics, Co., Ltd.
Dongyoung Seo , SAMSUNG Electronics, Co., Ltd.
Chanik Park , SAMSUNG Electronics, Co., Ltd.
Bumsoo Kim , SAMSUNG Electronics, Co., Ltd.
pp. 474
Stephen W. Keckler , The University of Texas at Austin
Charles R. Moore , The University of Texas at Austin
Premkishore Shivakumar , The University of Texas at Austin
pp. 481
John Lach , University of Virginia, Charlottesville
Mircea Stan , University of Virginia, Charlottesville
Zhijian Lu , University of Virginia, Charlottesville
pp. 489
Session 8.2 Novel Methods in Logic Synthesis
Andreas Kuehlmann , University of California at Berkeley, CA; Cadence Berkeley Labs, Berkeley, CA
Alberto Sangiovanni-Vincentelli , University of California at Berkeley, CA
pp. 498
Maxim Teslenko , Royal Institute of Technology, IMIT/KTH, Stockholm, Sweden
Elena Dubrova , Royal Institute of Technology, IMIT/KTH, Stockholm, Sweden
pp. 504
Samir Sapra , Carnegie Mellon University, Pittsburgh, PA
Michael Theobald , Carnegie Mellon University, Pittsburgh, PA
Edmund Clarke , Carnegie Mellon University, Pittsburgh, PA
pp. 510
Session 9.1 Communications and Context Management
Anand Selvarathinam , Texas A&M University
Euncheol Kim , Texas A&M University
Gwan Choi , Texas A&M University
pp. 520
Sudeep Pasricha , University of California, Irvine
Alex Veidenbaum , University of California, Irvine
pp. 526
D. Scott Wills , Georgia Institute of Technology, Atlanta
Linda M. Wills , Georgia Institute of Technology, Atlanta
pp. 532
Gianluca Biccari , University of Bologna, DEIS
Luca Giovannini , University of Bologna, DEIS
Matteo Dall'Osso , University of Bologna, DEIS
Luca Benini , University of Bologna, DEIS
pp. 536
Session 9.2 Board Test and Power-Aware Test
Ozgur Sinanoglu , University of California, San Diego
pp. 542
Mehrdad Nourani , The University of Texas at Dallas
pp. 548
N. Ahmed , The University of Texas at Dallas, Richardson
M. H. Tehranipour , The University of Texas at Dallas, Richardson
pp. 554
Author Index (PDF)
pp. 561
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