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1999 IEEE International Conference on Computer Design (ICCD'99)
Hardware/Software Partitioning of Multirate System Using Static Scheduling Theory
Austin, Texas
October 10-October 13
ISBN: 0-7695-0406-X
| ASCII Text | x | ||
| Romain Kamdem, Alain Fonkoua, Andre Zenatti, "Hardware/Software Partitioning of Multirate System Using Static Scheduling Theory," 2012 IEEE 30th International Conference on Computer Design (ICCD), pp. 640, 1999 IEEE International Conference on Computer Design (ICCD'99), 1999. | |||
| BibTex | x | ||
| @article{ 10.1109/ICCD.1999.808609, author = {Romain Kamdem and Alain Fonkoua and Andre Zenatti}, title = {Hardware/Software Partitioning of Multirate System Using Static Scheduling Theory}, journal ={2012 IEEE 30th International Conference on Computer Design (ICCD)}, volume = {0}, year = {1999}, issn = {1063-6404}, pages = {640}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.1999.808609}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - 2012 IEEE 30th International Conference on Computer Design (ICCD) TI - Hardware/Software Partitioning of Multirate System Using Static Scheduling Theory SN - 1063-6404 SP EP A1 - Romain Kamdem, A1 - Alain Fonkoua, A1 - Andre Zenatti, PY - 1999 KW - Codesign KW - hardware/software partitioning KW - scheduling KW - target architecture KW - real time KW - code-sign VL - 0 JA - 2012 IEEE 30th International Conference on Computer Design (ICCD) ER - | |||
We present a way to perform hardware/software partitioning of multi-rate systems based on static priority scheduling theory. The problem is described by a set of interacting concurrent tasks with execution deadlines and dependency constraints. The partitioning tries to reduce the hardware costs and communication overheads for tasks allocated to distinct computing resources. The target architecture includes one or two processors communicating through a bus or a double access RAM or one processor and an ASIC 1 . In the latter case, the ASIC could be used as a coprocessor or as an independent component communicating with the processor through a double access RAM.
Index Terms:
Codesign, hardware/software partitioning, scheduling, target architecture, real time, code-sign
Citation:
Romain Kamdem, Alain Fonkoua, Andre Zenatti, "Hardware/Software Partitioning of Multirate System Using Static Scheduling Theory," iccd, pp.640, 1999 IEEE International Conference on Computer Design (ICCD'99), 1999
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