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2012 IEEE 30th International Conference on Computer Design (ICCD) (1998)
Austin, Texas
Oct. 5, 1998 to Oct. 5, 1998
ISBN: 0-8186-9099-2
TABLE OF CONTENTS
pp. xvii
Reviewers (PDF)
pp. xix
Session 1.1: Keynote Speech
Session 1.2: Plenary
Special Invited Session 1.3.1: A Prototype 1 GHz PowerPC Microprocessor
Kevin J. Nowka , IBM Austin Research Laboratory
Tibi Galambos , IBM Haifa Research Laboratory
pp. 11
N. Aoki , IBM
J. Burns , IBM
S. Dhong , IBM
K. Lee , IBM
H. Ngo , IBM
K. Nowka , IBM
I. Vo , IBM
pp. 17
Session 1.3.2: Built-in-Self-Test
Session 1.3.3: Design Optimization
Alberto Allara , ITALTEL
William Fornaciari , Politecnico di Milano
Fabio Salice , Politecnico di Milano
Donatella Sciuto , Politecnico di Milano
pp. 48
Suhrid A. Wadekar , University of Southern California
Alice C. Parker , University of Southern California
pp. 54
François-R. Boyer , Universit? de Montr?al
El Mostapha Aboulhamid , Universit? de Montr?al
Y. Savaria , ?cole Polytechnique de Montr?al
I.E. Bennour 3 , Northern Telecom
pp. 62
Session 1.3.4: Power and Noise Estimation and Optimization
Qi Wang , The University of Arizona
Sarma B.K. Vrudhula , The University of Arizona
pp. 70
Ashish Karandikar , Intel Corporation
Keshab K. Parhi , University of Minnesota
pp. 82
Lunch Presentation
Special Invited Session 1.4.1: The Alpha 21264 Microprocessor
Emily Shriver , Compaq Computer Corporation
Dale Hall , Compaq Computer Corporation
Nevine Nassif , Compaq Computer Corporation
Nadir Rahman , Compaq Computer Corporation
Nick Rethman , Compaq Computer Corporation
Gill Watt , Compaq Computer Corporation
Jim Farrell , Compaq Computer Corporation
pp. 96
Session 1.4.2: Technical Forum
Session 1.4.3: Arithmetic I
Moises E. Robinson , University of Texas at Austin
Earl Swartzlander, Jr. , University of Texas at Austin
pp. 122
Martin Kuhlmann , University of Minnesota
Keshab K. Parhi , University of Minnesota
pp. 128
Peter-Michael Seidel , University of Saarland
Guy Even , Tel-Aviv University
pp. 142
Session 1.4.4: Logic Synthesis
J.W.J.M. Rutten , Eindhoven University of Technology
M.R.C.M. Berkelaar , Eindhoven University of Technology
pp. 152
Sumit Roy , Ambit Design Systems
Harm Arts , Ambit Design Systems
Prithviraj Banerjee , Northwestern University
pp. 175
Poster Session 1.5
Seiji Takeuchi , University of Tokyo
Takayasu Sakurai , University of Tokyo
pp. 184
Ran Ginosar , Technion-Israel Institute of Technology
Rakefet Kol , Technion-Israel Institute of Technology
pp. 188
Viresh Paruthi , University of Cincinnati
Nazanin Mansouri , University of Cincinnati
Ranga Vemuri , University of Cincinnati
pp. 192
Jianping Lu , Concordia University
Sofiene Tahar , Concordia University
Dan Voicu , University of Montreal
Xiaoyu Song , University of Montreal
pp. 195
Wai-Kei Mak , University of Texas at Austin
D.F. Wong , University of Texas at Austin
pp. 199
Maurice Inuani , Oxford University
Jonathan Saul , Oxford University
pp. 202
Raju D. Venkataramana , Univ of South Florida
N. Ranganathan , Univ of Texas at El Paso
pp. 205
Afshin Ganjoo , University of Southwestern Louisiana
pp. 208
Yun-Nan Chang , University of Minnesota
Keshab K. Parhi , University of Minnesota
pp. 211
ShenHui Wu , Colorado State University
Yashwant K. Malaiya , Colorado State University
Anura P. Jayasumana , Colorado State University
pp. 221
Session 1.6.1: Panel
Session 2.1: Plenary
Special Invited Session 2.2.1: The ARM Microprocessor
S.B. Furber , The University of Manchester,
J. D. Garside , The University of Manchester,
D.A. Gilbert , Cogency Technology, Inc.,
pp. 247
Session 2.2.2: Technical Forum
Embedded Tutorial
Session 2.2.4: High Performance Design Techniques
Vladimir Stojanovic , University of Belgrade
Vojin Oklobdzija , Integration, Berkeley, CA
Raminder Bajwa , Hitachi America Ltd
pp. 264
Lunch Presentation
Session 2.3.1: Arithmetic II
Hyun-Chul Shin , Korea Advanced Institute of Science and Technology
Jin-Aeon Lee , Korea Advanced Institute of Science and Technology
Lee-Sup Kim , Korea Advanced Institute of Science and Technology
pp. 286
Javier D. Bruguera , University of Santiago de Compostela
Tomas Lang , University of California at Irvine
pp. 298
Session 2.3.2: Practical Functional Verification
Nina Saxena , University of Texas at Austin
Jacob Abraham , University of Texas at Austin
pp. 314
Fulvio Corno , Politecnico di Torino
Matteo Sonza Reorda , Politecnico di Torino
Giovanni Squillero , Politecnico di Torino
pp. 321
Session 2.3.3: System Performance Issues
Jeffry T. Russell , University of Texas at Austin
Margarida F. Jacome , University of Texas at Austin
pp. 328
Mohamad Mansour , American University of Beirut
Ayman Kayssi , American University of Beirut
pp. 334
Karthikeya M. Gajjala Purna , University of Cincinnati
Dinesh Bhatia , University of Cincinnati
pp. 340
Session 2.3.4: Asynchronous Design Techniques
Luis A. Plana , Universidad Polit?cnica
Stephen H. Unger , Columbia University
pp. 348
S.W. Moore , University of Cambridge
P. Robinson , University of Cambridge
pp. 360
Session 2.4.1: Cache and Memory Systems
Edward S. Tam , The University of Michigan
Jude A. Rivers , The University of Michigan
Vijayalakshmi Srinivasan , The University of Michigan
Gary S. Tyson , The University of Michigan
Edward S. Davidson , The University of Michigan
pp. 368
Enyou Li , University of Auckland
Clark Thomborson , University of Auckland
pp. 376
Session 2.4.2: Timing and Synthesis Verification
Naren Narasimhan , University of Cincinnati
Elena Teica , University of Cincinnati
Rajesh Radhakrishnan , University of Cincinnati
Sriram Govindarajan , University of Cincinnati
Ranga Vemuri , University of Cincinnati
pp. 392
Session 2.4.3: Low Power/High Efficiency Networks
Alberto Nannarelli , University of California, Irvine
Tomas Lang , University of California, Irvine
pp. 420
Kenneth Y. Yun , University of California, San Diego
Kevin W. James , University of California, San Diego
Robert Fairlie-Cuninghame , University of California, San Diego
Rene L. Cruz , University of California, San Diego
Supratik Chakraborty , Stanford University
pp. 427
Session 2.4.4: High-Level Synthesis
Session 2.5.1: Panel
Dinner Presentation
Session 3.1: Plenary
Session 3.2.1: Embedded Tutorial
Session 3.2.2: VLIW and Parallel Processing
Nan Ni , Texas A&M University
Marius Pirvu , Texas A&M University
Laxmi Bhuyan , Texas A&M University
pp. 466
Andrew Chang , Stanford University
William J. Dally , Stanford University
Stephen W. Keckler , Stanford University
Nicholas P. Carter , Stanford University
Whay S. Lee , Massachusetts Institute of Technology
pp. 474
Session 3.2.3: ATPG
Xijiang Lin , University of Iowa
Irith Pomeranz , University of Iowa
Sudhakar M. Reddy , University of Iowa
pp. 498
Fulvio Corno , Politecnico di Torino
Matteo Sonza Reorda , Politecnico di Torino
Roberto Vietti , Politecnico di Torino
Janak H. Patel , University Illinois
Elizabeth M. Rudnick , University Illinois
pp. 504
Paulo F. Flores , Instituto Superior Tecnico/INESC
Horacio C. Neto , Instituto Superior Tecnico/INESC
Joao P. Marques Silva , Instituto Superior Tecnico/INESC
pp. 510
William E. Dougherty , Carnegie Mellon University
R.D. (Shawn) Blanton , Carnegie Mellon University
pp. 516
Session 3.2.4: Timing and Power Analysis
Hoon Choi , Korea Advanced Institute of Science and Technology,
Seung Ho Hwang , Korea Advanced Institute of Science and Technology,
pp. 536
Radjakichenin Radjassamy , The University of Arizona
Jo Dale Carothers , The University of Arizona
pp. 542
Session 3.3.1: Performance Analysis and Microarchitecture
Lizy John , The University of Texas at Austin
Yin Teh , The University of Texas at Austin
Francis Matus , The University of Texas at Austin
Craig Chase , The University of Texas at Austin
pp. 550
Lucian Codrescu , Georgia Institute of Technology
D. Scott Wills , Georgia Institute of Technology
pp. 558
Ing-Jer Huang , National Sun Yat-sen University
Tzu-Chin Peng , National Sun Yat-sen University
pp. 566
Session 3.3.2: Mixed Signal Testing
Session 3.3.3: Co-Design
Sadiq M. Sait , King Fahd University of Petroleum & Minerals
Walling R. Cyre , Virginia Tech
pp. 596
Alex Doboli , University of Cincinnati
Petru Eles , Linkoping University
pp. 602
Huiqun Liu , University of Texas at Austin
D. F. Wong , University of Texas at Austin
pp. 609
Session 3.3.4: Place and Route
Aiguo Lu , LSI Logic Corporation
Hans Eisenmann , Technical University of Munich
Guenter Stenz , Technical University of Munich
Frank M. Johannes , Technical University of Munich
pp. 616
Lixin Su , University of California at Berkeley
Wray Buntine , University of California at Berkeley
Richard A. Newton , University of California at Berkeley
Bradley S. Peters , University of California at Berkeley
pp. 622
Kai Zhu , Triscend Corp.
Yao-Wen Chang , National Chiao Tung University
D.F. Wong , University of Texas at Austin
pp. 628
Author Index (PDF)
pp. 642
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