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2003 International Conference on Computer-Aided Design (ICCAD '03)
On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis
San Jose, CA
November 09-November 13
ISBN: 1-58113-762-1
Saurabh N. Adya, University of Michigan, Ann Arbor
Igor L. Markov, University of Michigan, Ann Arbor
Paul G. Villarrubia, IBM, Corporation, Austin, TX
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible gate sizing, net buffering and detail placement require a certain amount of unused space in every region of the die. The need for "local" whitespace is further emphasized by temperature and power-density limits. Another requirement, the stability of placement results from run to run, is important to the convergence of physical synthesis loops. Indeed, logic resynthesis targetting local congestion in a given placement or particular critical paths may be irrelevant for another placement produced by the same or a different layout tool.
In this work we offer solutions to the above problems. We show how to tie the results of a placer to a previously existing placement, and yet leave room for optimization. In our experiments this technique produces placements with similar congestion maps. We also show how to trade-off wirelength for routability by manipulating whitespace. Empirically, our techniques improve circuit delay of sparse layouts in conjunction with physical synthesis.
In the context of earlier proposed techniques for mixed-size placement, we tune a state-of-the-art recursive bisection placer to better handle regular netlists that offer a convenient way to represent memories, datapaths and random-logic IP blocks. These modifications and better whitespace distribution improve results on recent mixed-size placement benchmarks.
Saurabh N. Adya, Igor L. Markov, Paul G. Villarrubia, "On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis," iccad, pp.311, 2003 International Conference on Computer-Aided Design (ICCAD '03), 2003
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