This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
10th International Symposium on High Performance Computer Architecture (HPCA'04)
Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization
Madrid, Spain
February 14-February 18
ISBN: 0-7695-2053-7
Russ Joseph, Princeton University
Zhigang Hu, IBM Corporation
Margaret Martonosi, Princeton University

As microprocessors become increasingly complex, the techniques used to analyze and predict their behavior must become increasingly rigorous. This paper applies wavelet analysis techniques to the problem of dI/dt estimation and control in modern microprocessors. While prior work has considered Bayesian phase analysis, Markov analysis, and other techniques to characterize hardware and software behavior, we know of no prior work using wavelets for characterizing computer systems.

The dI/dt problem has been increasingly vexing in recent years, because of aggressive drops in supply voltage and increasingly large relative fluctuations in CPU current dissipation. Because the dI/dt problem has a natural frequency dependence (it is worst in the mid-frequency range of roughly 50-200MHz) it is natural to apply frequency-oriented techniques like wavelets to understand it. Our work proposes (i) an off-line wavelet-based estimation technique that can accurately predict a benchmark?s likelihood of causing voltage emergencies, and (ii) an on-line wavelet-based control technique that uses key wavelet coefficients to predict and avert impending voltage emergencies. The off-line estimation technique works with roughly 0.94% error. The on-line control technique reduces false positives in dI/dt prediction, allowing voltage control to occur with less than 2.5% performance overhead on the SPEC benchmark suite.

Citation:
Russ Joseph, Zhigang Hu, Margaret Martonosi, "Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization," hpca, pp.36, 10th International Symposium on High Performance Computer Architecture (HPCA'04), 2004
Usage of this product signifies your acceptance of the Terms of Use.