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The Fifth International Symposium on High Performance Computer Architecture
Orlando, Florida
January 09-January 12
ISBN: 0-7695-0004-8
Table of Contents
Keynote Address I: Computing and Policy - Are We Fumbling the Future Again?
Session 1: Performance Enhancements
Session 2: Simultaneous Multithreading
Joan-Manuel Parcerisa, Universitat Polit?cnica de Catalunya - Barcelona
Antonio González, Universitat Polit?cnica de Catalunya - Barcelona
pp. 59
Session 3: Memory Systems
Panel Session 1: Controversial Panel
Keynote Address II: Software and HPCA
Session 4: Instruction Scheduling & Speculation
Session 5A: Cache Coherence
Session 5B: SMP Clusters
Session 6A: Cache and I/O Systems
Yiming Hu, University of Rhode Island
Qing Yang, University of Rhode Island
Tycho Nightingale, University of Rhode Island
pp. 204
Session 6B: Communication Issues I
Panel Session II: Storage: It Ain't Secondary Any More
Keynote Address II: The Automation of Computer Architecture: Yet Another Consequence of Moore's Law
Session 7A: Shared Memory
Session 7B: Communication Issues II
Andrew Sohn, New Jersey Institute of Technology
Yunheung Paek, New Jersey Institute of Technology
Jui-Yuan Ku, New Jersey Institute of Technology
Yuetsu Kodama, Electrotechnical Laboratory
Yoshinori Yamaguchi, Electrotechnical Laboratory
pp. 310
J.M. Martinez, Universidad Politecnica de Valencia
P. Lopez, Universidad Politecnica de Valencia
J. Duato, Universidad Politecnica de Valencia
pp. 315
Workshop Overviews
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