CSDL - Proceedings F

Message from the Conference Chair (PDF)

pp. xii

Message from the Program Chairs (PDF)

pp. xiv

FTCS-26 Organizing Committee (PDF)

pp. xvi

Conference Committee (PDF)

pp. xviii

Program Committee (PDF)

pp. xx

Fund Raising Committee (PDF)

pp. xxii

Reviewers (PDF)

pp. xxiii

Panel 1

"Availability of Commercial Parallel Systems" (PDF)

pp. 2

Session Al - Distributed Systems, Chair: Hermann Kopetz, Austria

Reconfiguration and transient recovery in state machine architectures (Abstract)

J. Rushby, Comput. Sci. Lab., SRI Int., Menlo Park, CA, USA

pp. 6

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Recoverable mobile environment: design and trade-off analysis (Abstract)

D.K. Pradhan, Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA

P. Krishna, Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA

N.H. Vaidya, Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA

pp. 16

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Evaluating quorum systems over the Internet (Abstract)

Y. Amir, Dept. of Comput. Sci., Johns Hopkins Univ., Baltimore, MD, USA

A. Wool, Dept. of Comput. Sci., Johns Hopkins Univ., Baltimore, MD, USA

pp. 26

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Session B1 - Testing, Chair: Hirokazu Ihara, Japan

A fault simulation method for crosstalk faults in synchronous sequential circuits (Abstract)

N. Itazaki, Dept. of Appl. Phys., Osaka Univ., Japan

Y. Idomoto, Dept. of Appl. Phys., Osaka Univ., Japan

K. Kinoshita, Dept. of Appl. Phys., Osaka Univ., Japan

pp. 38

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Random pattern testing for sequential circuits revisited (Abstract)

L. Nachman, Dept. of Electr. & Comput. Eng., Wisconsin Univ., WI, USA

K.K. Saluja, Dept. of Electr. & Comput. Eng., Wisconsin Univ., WI, USA

S. Upadyaya, Dept. of Electr. & Comput. Eng., Wisconsin Univ., WI, USA

R. Reuse, Dept. of Electr. & Comput. Eng., Wisconsin Univ., WI, USA

pp. 44

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Dynamic test compaction for synchronous sequential circuits using static compaction techniques (Abstract)

I. Pomeranz, Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA

S.M. Reddy, Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA

pp. 53

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Session A2 - File Systems, Chair: Ambuj Goyal, USA

FT-NFS: an efficient fault-tolerant NFS server designed for off-the-shelf workstations (Abstract)

N. Peyrouze, IRISA, Rennes, France

G. Muller, IRISA, Rennes, France

pp. 64

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Design and evaluation of fault-tolerant shared file system for cluster systems (Abstract)

S. Sumimoto, Fujitsu Labs. Ltd., Kawasaki, Japan

pp. 74

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Session B2 - Diagnosis, Chair: Arun Somani, USA

Multiple fault diagnosis in sequential circuits using sensitizing sequence pairs (Abstract)

N. Yanagida, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan

H. Takahashi, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan

Y. Takamatsu, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan

pp. 86

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Fault diagnosis using state information (Abstract)

V. Boppana, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

I. Hartanto, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

W.K. Fuchs, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

pp. 96

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Session A3 - Evaluation, Chair: Shunji Osaki, Japan

Modeling the dependability of CAUTRA, a subset of the French air traffic control system (Abstract)

K. Kanoun, CENA, Toulouse, France

M. Borrel, CENA, Toulouse, France

T. Morteveille, CENA, Toulouse, France

A. Peytavin, CENA, Toulouse, France

pp. 106

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A new methodology for calculating distributions of reward accumulated during a finite interval (Abstract)

M.A. Qureshi, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

W.H. Sanders, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

pp. 116

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Session B3 - On-Line Checking, Chair: Yoshihiro Tohma, Japan

Algebraic techniques for the optimization of control flow checking (Abstract)

G. Noubir, Dept. of Comput. Sci., Swiss Federal Inst. of Technol., Lausanne, Switzerland

B.Y. Choueiry, Dept. of Comput. Sci., Swiss Federal Inst. of Technol., Lausanne, Switzerland

pp. 128

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Executable assertions and timed traces for on-line software error detection (Abstract)

C. Rabejac, Lab. for Dependability Eng., CNRS, Toulouse, France

J.-P. Blanquart, Lab. for Dependability Eng., CNRS, Toulouse, France

J.-P. Queille, Lab. for Dependability Eng., CNRS, Toulouse, France

pp. 138

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Panel 2

"Dependability of Raitway Control Systems" (Abstract)

pp. 150

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Session A4 - Group Communication, Chair: Rick Schlichting, USA

A multiple bus broadcast protocol resilient to non-cooperative Byzantine faults (Abstract)

K. Echtle

A Masum

pp. 158

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Consensus service: a modular approach for building agreement protocols in distributed systems (Abstract)

R. Guerraoui, Dept. d'Inf., Ecole Polytech. Federale de Lausanne, Switzerland

A. Schiper, Dept. d'Inf., Ecole Polytech. Federale de Lausanne, Switzerland

pp. 168

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Group, majority, and strict agreement in timed asynchronous distributed systems (Abstract)

F. Cristian, Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA

pp. 178

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Session 64 - Coding, Chair: Jacob A. Abraham

Optimal two-level unequal error control codes for computer systems (Abstract)

T. Ritthongpitak, Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan

M. Kitakami, Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan

E. Fujiwara, Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan

pp. 190

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Symbol error correcting codes for memory applications (Abstract)

C.L. Chen, Data Syst. Div., IBM Corp., Poughkeepsie, NY, USA

pp. 200

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Limitations of VLSI implementation of delay-insensitive codes (Abstract)

V. Akella, Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA

N.H. Vaidya, Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA

G.R. Redinbo, Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA

pp. 208

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Session A5 - Verification and Testing, Chair: Tohru Kikuno, Japan

Verification of fault tolerance and real time (Abstract)

Zhiming Liu, Dept. of Math. & Comput. Sci., Leicester Univ., UK

M. Joseph, Dept. of Math. & Comput. Sci., Leicester Univ., UK

pp. 220

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A framework for conformance testing of systems communicating through rendezvous (Abstract)

Q.M. Tan, Dept. d'Inf. et de Recherche Oper., Montreal Univ., Que., Canada

A. Petrenko, Dept. d'Inf. et de Recherche Oper., Montreal Univ., Que., Canada

G. von Bochmann, Dept. d'Inf. et de Recherche Oper., Montreal Univ., Que., Canada

pp. 230

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Session B5 - Design, Chair: Algirdas Avizienis, USA

Mitigating operator-induced unavailability by matching imprecise queries (Abstract)

R.A. Maxion, Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA

P.A. Syme, Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA

pp. 240

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Supporting nondeterministic execution in fault-tolerant systems (Abstract)

J.H. Slye, Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

E.N. Elnozahy, Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

pp. 250

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Session A6 - Networks, Chair: Douglas M. Blough, USA

Reliable broadcasting in product networks with Byzantine faults (Abstract)

Feng Bao, Dept. of Comput. Sci., Gunma Univ., Japan

Y. Igarishi, Dept. of Comput. Sci., Gunma Univ., Japan

pp. 262

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Hardware-efficient and highly-reconfigurable 4- and 2-track fault-tolerant designs for mesh-connected multicomputers (Abstract)

N.R. Mahapatra, Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA

S. Dutt, Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA

pp. 272

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Spare processor allocation for fault tolerance in torus-based multicomputers (Abstract)

M.M. Bae, Dept. of Comput. Sci., Oregon State Univ., Corvallis, OR, USA

B. Bose, Dept. of Comput. Sci., Oregon State Univ., Corvallis, OR, USA

pp. 282

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Session B6 - Experiment and Analysis, Chair: John F. Meyer, USA

A comparative analysis of event tupling schemes (Abstract)

M.F. Buckley, IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

D.P. Siewiorek, IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

pp. 294

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Generation of an error set that emulates software faults based on field data (Abstract)

J. Christmansson, Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden

R. Chillarege, Dept. of Comput. Eng., Chalmers Univ. of Technol., Goteborg, Sweden

pp. 304

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An approach towards benchmarking of fault-tolerant commercial systems (Abstract)

T.K. Tsai, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

R.K. Iyer, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

D. Jewitt, Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA

pp. 314

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Session A7 - Self-Checking, Chair: Takashi Nanya, Japan

The design of totally self-checking checkers for some classes of Hadamard codes (Abstract)

N. Wakita, Toshiba Corp., Kawasaki, Japan

K. Takagi, Toshiba Corp., Kawasaki, Japan

Y. Iwadare, Toshiba Corp., Kawasaki, Japan

pp. 326

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Behavioral synthesis of fault secure controller/datapaths using aliasing probability analysis (Abstract)

G. Lakshminarayana, Dept. of Electr. Eng., Princeton Univ., NJ, USA

A. Raghunathan, Dept. of Electr. Eng., Princeton Univ., NJ, USA

N.k. Jha, Dept. of Electr. Eng., Princeton Univ., NJ, USA

pp. 336

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Session 67 - Practical Experience Reports I, Chair: Jean-Claude Laprie, France

Efficient service of rediscovered software problems (Abstract)

I. Lee, Syst. Dev. Group, Tandem Comput. Inc., Cupertino, CA, USA

G. Pitt, Syst. Dev. Group, Tandem Comput. Inc., Cupertino, CA, USA

R.K. Iyer, Syst. Dev. Group, Tandem Comput. Inc., Cupertino, CA, USA

pp. 348

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Formal methods for the validation of fault tolerance in autonomous spacecraft (Abstract)

S. Ayache, Matra Marconi Space, Toulouse, France

E. Conquet, Matra Marconi Space, Toulouse, France

P. Humbert, Matra Marconi Space, Toulouse, France

C. Rodriguez, Matra Marconi Space, Toulouse, France

J. Sifakis, Matra Marconi Space, Toulouse, France

R. Gerlich, Matra Marconi Space, Toulouse, France

pp. 353

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Session A8 - Parallelization, Chair: Fumiyasu Hirose, Japan

Compiler-assisted generation of error-detecting parallel programs (Abstract)

A. Roy-Chowdhury, IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

P. Banerjee, IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

pp. 360

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Evaluation of checkpoint mechanisms for massively parallel machines (Abstract)

Tzi-Cker Chiueh, Dept. of Comput. Sci., State Univ. of New York, Stony Brook, NY, USA

Peitao Deng, Dept. of Comput. Sci., State Univ. of New York, Stony Brook, NY, USA

pp. 370

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Session B8 - Practical Experience Reports II, Chair: Basil Smith, USA

The redundancy mechanisms of the Ariane 5 Operational Control Center (Abstract)

J.-L. Dega, Matra Marconi Space, Toulouse, France

pp. 382

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Highly available directory services in DCE (Abstract)

B. Acevedo, Bellcore, Morristown, NJ, USA

L. Bahler, Bellcore, Morristown, NJ, USA

E.N. Elnozahy, Bellcore, Morristown, NJ, USA

V. Ratan, Bellcore, Morristown, NJ, USA

M.E. Segal, Bellcore, Morristown, NJ, USA

pp. 387

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Session A9 - Fault Injection, Chair: Jan Toxin, Sweden

Experimental evaluation of the fail-silent behaviour in programs with consistency checks (Abstract)

M.Z. Rela, Dept. of Eng. Inf., Coimbra Univ., Portugal

H. Madeira, Dept. of Eng. Inf., Coimbra Univ., Portugal

J.G. Silva, Dept. of Eng. Inf., Coimbra Univ., Portugal

pp. 394

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Testing of fault-tolerant and real-time distributed systems via protocol fault injection (Abstract)

S. Dawson, Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

F. Jahanian, Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

T. Mitton, Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

Teck-Lee Tung, Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

pp. 404

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Experimental assessment of parallel systems (Abstract)

J.G. Silva, Dept. of Eng. Inf., Coimbra Univ., Portugal

J. Carreira, Dept. of Eng. Inf., Coimbra Univ., Portugal

H. Madeira, Dept. of Eng. Inf., Coimbra Univ., Portugal

D. Costa, Dept. of Eng. Inf., Coimbra Univ., Portugal

P. Moreira, Dept. of Eng. Inf., Coimbra Univ., Portugal

pp. 415

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Session B9 - Practical Experience Reports III, Chair: Alain Costes, France

Self-checking and fail-safe LSIs by intra-chip redundancy (Abstract)

N. Kanekawa, Res. Lab., Hitachi Ltd., Japan

M. Nohmi, Res. Lab., Hitachi Ltd., Japan

Y. Satoh, Res. Lab., Hitachi Ltd., Japan

H. Satoh, Res. Lab., Hitachi Ltd., Japan

pp. 426

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Technologies for designing dependable A/D converters (Abstract)

K. Kawamura, Dept. of Comput. Sci., Nat. Defense Acad., Yokosuka, Japan

T. Matsubara, Dept. of Comput. Sci., Nat. Defense Acad., Yokosuka, Japan

Y. Koga, Dept. of Comput. Sci., Nat. Defense Acad., Yokosuka, Japan

pp. 431

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Two error-detecting and correcting circuits for space applications (Abstract)

R. Johansson, Saab Ericsson Space, Gothenburg, Sweden

pp. 436

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Author Index (PDF)

pp. 441