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2011 21st International Conference on Field Programmable Logic and Applications
Modeling and Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-Based Systems Using Stochastic Networks
Chania, Chania Greece
September 05-September 07
ISBN: 978-0-7695-4529-5
| ASCII Text | x | ||
| Rehan Ahmed, Peter Hallschmid, "Modeling and Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-Based Systems Using Stochastic Networks," International Conference on Field Programmable Logic and Applications, pp. 70-75, 2011 21st International Conference on Field Programmable Logic and Applications, 2011. | |||
| BibTex | x | ||
| @article{ 10.1109/FPL.2011.23, author = {Rehan Ahmed and Peter Hallschmid}, title = {Modeling and Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-Based Systems Using Stochastic Networks}, journal ={International Conference on Field Programmable Logic and Applications}, volume = {0}, year = {2011}, isbn = {978-0-7695-4529-5}, pages = {70-75}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPL.2011.23}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - International Conference on Field Programmable Logic and Applications TI - Modeling and Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-Based Systems Using Stochastic Networks SN - 978-0-7695-4529-5 SP70 EP75 A1 - Rehan Ahmed, A1 - Peter Hallschmid, PY - 2011 KW - Field-Programmable Gate Arrays KW - Partial Reconfiguration KW - Queueing Theory KW - Reconfigurable Computing KW - Modeling VL - 0 JA - International Conference on Field Programmable Logic and Applications ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPL.2011.23
The dynamic partial reconfiguration of FPGAs is a method which modifies parts of FPGA configuration memory at run-time. The hardware resources and time overhead needed to perform a partial reconfiguration (PR) can significantly impact overall system cost and performance and must be considered early in the design cycle. Unfortunately, predicting reconfiguration overhead is difficult especially in the presence of non-deterministic factors such as the sharing of resources with traffic not related to the PR process. Thus, current design practices include the measurement of overhead but only after the system has been built thus limiting the number of candidates that can be evaluated. We propose a flexible approach for modeling the PR datapath based on Queueing Theory such that we can estimate performance trends and bottlenecks of the PR process while considering the impact of shared resources. Performance trends are provided for an example system to demonstrate the effectiveness of the approach.
Index Terms:
Field-Programmable Gate Arrays, Partial Reconfiguration, Queueing Theory, Reconfigurable Computing, Modeling
Citation:
Rehan Ahmed, Peter Hallschmid, "Modeling and Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-Based Systems Using Stochastic Networks," fpl, pp.70-75, 2011 21st International Conference on Field Programmable Logic and Applications, 2011
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