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Charlotte, North Carolina, USA
May 2, 2010 to May 4, 2010
ISBN: 978-0-7695-4056-6
pp: 237-244
In this paper, we present a novel technique for transmitting data over the power supply pins of an FPGA. Using this power side channel communication, a core inside the FPGA is able to send data to a receiver outside of the FPGA. Possible applications include monitoring, debugging, and watermarking. For the communication, we do not need any further resources, like IO pins or modifications of the board. We characterize the communication channel over the power pins and build a channel model. Furthermore, we present an encoding/decoding method which is independent of the board type and FPGA combination. With this approach, we achieve data rates up to 500 kbit/s. Finally, we provide a case study, which extends existing power watermarking techniques to the new encoding/decoding method and show experimental decoding results.
FPGA, Power Communication, Power Watermarking, IP Protection, IP Core, Side Channel
Daniel Ziener, Florian Baueregger, Jürgen Teich, "Using the Power Side Channel of FPGAs for Communication", FCCM, 2010, Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, Field-Programmable Custom Computing Machines, Annual IEEE Symposium on 2010, pp. 237-244, doi:10.1109/FCCM.2010.43
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