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2009 17th IEEE Symposium on Field Programmable Custom Computing Machines
FPGA Implementation of a Single-Precision Floating-Point Multiply-Accumulator with Single-Cycle Accumulation
Napa, California
April 05-April 07
ISBN: 978-0-7695-3716-0
This paper describes an FPGA implementation of a single-precision floating-point multiply-accumulator (FPMAC) that supports single-cycle accumulation while maintaining high clock frequencies. A non-traditional internal representation reduces the cost of mantissa alignment within the accumulator. The FPMAC is evaluated on an Altera Stratix III FPGA.
Citation:
Arun Paidimarri, Alessandro Cevrero, Philip Brisk, Paolo Ienne, "FPGA Implementation of a Single-Precision Floating-Point Multiply-Accumulator with Single-Cycle Accumulation," fccm, pp.267-270, 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines, 2009
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