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Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Pipeline Vectorization for Reconfigurable Systems
Napa California
April 21-April 23
ISBN: 0-7695-0375-6
| ASCII Text | x | ||
| Markus Weinhardt, Wayne Luk, "Pipeline Vectorization for Reconfigurable Systems," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 52, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999. | |||
| BibTex | x | ||
| @article{ 10.1109/FPGA.1999.803667, author = {Markus Weinhardt and Wayne Luk}, title = {Pipeline Vectorization for Reconfigurable Systems}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1999}, issn = {1082-3409}, pages = {52}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1999.803667}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - Pipeline Vectorization for Reconfigurable Systems SN - 1082-3409 SP EP A1 - Markus Weinhardt, A1 - Wayne Luk, PY - 1999 KW - hardware pipelines KW - vectorization KW - loop transformations KW - reconfigurable computing KW - FPGAs VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER - | |||
This paper presents pipeline vectorization, a method for synthesizing hardware pipelines in reconfigurable systems based on software vectorizing compilers. The method improves efficiency and ease of development of reconfigurable designs, particularly for users with little electronics design experience. We propose several loop transformations to customize pipelines to meet hardware resource constraints, while maximizing available parallelism. For run-time reconfigurable systems, we apply hardware specialization to increase circuit utilization. Our approach is especially effective for highly repetitive computations in DSP and multimedia applications. Case studies using FPGA-based platforms are presented to demonstrate the benefits of our approach and to evaluate tradeoffs between alternative implementations. The loop tiling transformation, for instance, has been found to improve performance by 30 to 40 times above a PC-based software implementation, depending on whether run-time reconfiguration is used.
Index Terms:
hardware pipelines, vectorization, loop transformations, reconfigurable computing, FPGAs
Citation:
Markus Weinhardt, Wayne Luk, "Pipeline Vectorization for Reconfigurable Systems," fccm, pp.52, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999
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