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IEEE Symposium on FPGAs for Custom Computing Machines
The Systolic Array Genetic Algorithm, An Example of Systolic Arrays as a Reconfigurable Design Methodology.
Napa Valley, California
April 15-April 17
ISBN: 0-8186-8900-5
| ASCII Text | x | ||
| I.M. Bland, G.M. Megson, "The Systolic Array Genetic Algorithm, An Example of Systolic Arrays as a Reconfigurable Design Methodology.," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 260, IEEE Symposium on FPGAs for Custom Computing Machines, 1998. | |||
| BibTex | x | ||
| @article{ 10.1109/FPGA.1998.707907, author = {I.M. Bland and G.M. Megson}, title = {The Systolic Array Genetic Algorithm, An Example of Systolic Arrays as a Reconfigurable Design Methodology.}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1998}, issn = {1082-3409}, pages = {260}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707907}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - The Systolic Array Genetic Algorithm, An Example of Systolic Arrays as a Reconfigurable Design Methodology. SN - 1082-3409 SP EP A1 - I.M. Bland, A1 - G.M. Megson, PY - 1998 VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER - | |||
We advocate the use of systolic design techniques to create custom hardware for Custom Computing Machines. We have developed a hardware genetic algorithm based on systolic arrays to illustrate the feasibility of the approach. The architecture is independent of the lengths of chromosomes used and can be scaled in size to accommodate different population sizes. An FPGA prototype design can process 16 million genes per second.
Citation:
I.M. Bland, G.M. Megson, "The Systolic Array Genetic Algorithm, An Example of Systolic Arrays as a Reconfigurable Design Methodology.," fccm, pp.260, IEEE Symposium on FPGAs for Custom Computing Machines, 1998
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