A time-multiplexed FPGA

S. Trimberger; J. Wong; D. Carberry; A. Johnson

doi:10.1109/FPGA.1997.624601

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5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97)

A time-multiplexed FPGA

Napa Valley, CA

April 16-April 18

ISBN: 0-8186-8159-4

	ASCII Text	x
	S. Trimberger, D. Carberry, A. Johnson, J. Wong, "A time-multiplexed FPGA," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 22, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997.

	BibTex	x
	@article{ 10.1109/FPGA.1997.624601, author = {S. Trimberger and D. Carberry and A. Johnson and J. Wong}, title = {A time-multiplexed FPGA}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1997}, issn = {1082-3409}, pages = {22}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.624601}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - A time-multiplexed FPGA SN - 1082-3409 SP EP A1 - S. Trimberger, A1 - D. Carberry, A1 - A. Johnson, A1 - J. Wong, PY - 1997 KW - time division multiplexing; time-multiplexed FPGA; field programmable gate array; FPGA architecture; configurations; on-chip memory; inactive memory; block RAM; Xilinx XC4000E FPGA; state saving; state forwarding; routing demand; SRAM; reconfigurable archit VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

S. Trimberger, Xilinx Inc., San Jose, CA, USA

D. Carberry, Xilinx Inc., San Jose, CA, USA

A. Johnson, Xilinx Inc., San Jose, CA, USA

J. Wong, Xilinx Inc., San Jose, CA, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1997.624601

This paper describes the architecture of a time-multiplexed FPGA. Eight configurations of the FPGA are stored in on-chip memory. This inactive on-chip memory is distributed around the chip, and accessible so that the entire configuration of the FPGA can be changed in a single cycle of the memory. The entire configuration of the FPGA can be loaded from this on-chip memory in 30 ns. Inactive memory is accessible as block RAM for applications. The FPGA is based on the Xilinx XC4000E FPGA, and includes extensions for dealing with state saving and forwarding and for increased routing demand due to time-multiplexing the hardware.

Index Terms:

time division multiplexing; time-multiplexed FPGA; field programmable gate array; FPGA architecture; configurations; on-chip memory; inactive memory; block RAM; Xilinx XC4000E FPGA; state saving; state forwarding; routing demand; SRAM; reconfigurable archit

Citation:

S. Trimberger, D. Carberry, A. Johnson, J. Wong, "A time-multiplexed FPGA," fccm, pp.22, 5th IEEE Symposium on FPGA-Based Custom Computing Machines (FCCM '97), 1997

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