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Proceedings of the 22nd EUROMICRO Conference Prague, Czech Republic September 02-September 05 ISBN: 0-8186-7487-3 Table of Contents
 | Session Al : System-Level Design |
L. Jozwiak, Digitial Syst. Group, Eindhoven Univ. of Technol., Netherlands
S.A. Ong, Digitial Syst. Group, Eindhoven Univ. of Technol., Netherlands pp. 0008
J.P.M. Voeten, Sect. of Digital Inf. Syst., Eindhoven Univ. of Technol., Netherlands
M.P.J. Stevens, Sect. of Digital Inf. Syst., Eindhoven Univ. of Technol., Netherlands pp. 0019
| Session A2: Multiprocessor Architectures |
A.M. del Corral, Dept. d'Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain
J.M. Llaberia, Dept. d'Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain pp. 0038
I. Vassanyi, KFKI Res. Inst. for Meas. & Comput. Tech., Budapest, Hungary
I. Erenyi, KFKI Res. Inst. for Meas. & Comput. Tech., Budapest, Hungary pp. 0046
B. Klauer, Tech. Inf., J.W. Goethe Univ., Frankfurt, Germany
R. Moore, Tech. Inf., J.W. Goethe Univ., Frankfurt, Germany pp. 0051
| Session A3: Real Time |
J.F. Conde, Open Real-Time Syst. Center, Univ. de La Coruna, Spain
A. Vina, Open Real-Time Syst. Center, Univ. de La Coruna, Spain pp. 0061
J. Etkin, GTE Labs. Inc., Waltham, MA, USA pp. 0069
S. Bradley, Dept. of Comput., Univ. of Northumbria, Newcastle, UK
W. Henderson, Dept. of Comput., Univ. of Northumbria, Newcastle, UK
D. Kendall, Dept. of Comput., Univ. of Northumbria, Newcastle, UK
A. Robson, Dept. of Comput., Univ. of Northumbria, Newcastle, UK
S. Hawkes, Dept. of Comput., Univ. of Northumbria, Newcastle, UK pp. 0077
| Session Bl: Design Methodologies and Tools |
R. Rauscher, Dept. of Comput. Sci., Hamburg Univ., Germany pp. 0088
J.M.S. Alcantara, Nucleo de Computacao Electronica, Univ. Federal do Rio de Janeiro, Brazil
C.E.T. Oliveira, Nucleo de Computacao Electronica, Univ. Federal do Rio de Janeiro, Brazil
M.L. Anido, Nucleo de Computacao Electronica, Univ. Federal do Rio de Janeiro, Brazil pp. 0096
K. Agsteiner, Dept. of Comput. Sci., Univ. of Technol. Chemnitz-Zwickau, Germany
D. Monjau, Dept. of Comput. Sci., Univ. of Technol. Chemnitz-Zwickau, Germany
S. Schulze, Dept. of Comput. Sci., Univ. of Technol. Chemnitz-Zwickau, Germany pp. 0104
| Session B2: Optimization |
D. De Vito, Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France
O. Michel, Lab. de Recherche en Inf., Univ. de Paris-Sud, Orsay, France pp. 0114
| Session B3: Development of Control Systems |
E. Lassila, Digital Syst. Lab., Helsinki Univ. of Technol., Espoo, Finland pp. 0136
J. Hlavicka, Dept. of Comput. Sci., Czech Tech. Univ., Prague, Czech Republic
S. Racek, Dept. of Comput. Sci., Czech Tech. Univ., Prague, Czech Republic
P. Smrha, Dept. of Comput. Sci., Czech Tech. Univ., Prague, Czech Republic pp. 0143
T. Doersam, Inst. for Microcomput. & Autom., Karlsruhe Univ., Germany pp. 0158
| Session C1: Formal Methods for Hardware Design |
S.L. Pandey, Comput. Archit. Design Lab., Cincinnati Univ., OH, USA
P.A. Wilsey, Comput. Archit. Design Lab., Cincinnati Univ., OH, USA pp. 0167
C. Huijs, Twente Univ., Enschede, Netherlands pp. 0177
B. Antal, Dept. of Meas. & Instrum. Eng., Tech. Univ. Budapest, Hungary
G. Csertan, Dept. of Meas. & Instrum. Eng., Tech. Univ. Budapest, Hungary
I. Majzik, Dept. of Meas. & Instrum. Eng., Tech. Univ. Budapest, Hungary
A. Bondavalli, Dept. of Meas. & Instrum. Eng., Tech. Univ. Budapest, Hungary
L. Simoncini, Dept. of Meas. & Instrum. Eng., Tech. Univ. Budapest, Hungary pp. 0193
| Session C2: Performance Engineering |
C. Siegelin, Dept. Inf., Ecole Nat. Superieure des Telecommun., Paris, France
C. O'Donnell, Dept. Inf., Ecole Nat. Superieure des Telecommun., Paris, France
U. Finger, Dept. Inf., Ecole Nat. Superieure des Telecommun., Paris, France pp. 0202
R. Giorgi, Dipartimento di Ingegneria dell'Inf., Pisa Univ., Italy
C.A. Prete, Dipartimento di Ingegneria dell'Inf., Pisa Univ., Italy
L. Ricciardi, Dipartimento di Ingegneria dell'Inf., Pisa Univ., Italy
G. Prina, Dipartimento di Ingegneria dell'Inf., Pisa Univ., Italy pp. 0207
J.M. Garcia, Dept. de Inf. y Sistemas, Murcia Univ., Spain
A. Flores, Dept. de Inf. y Sistemas, Murcia Univ., Spain pp. 0215
L. Borzemski, Inst. of Control & Syst. Eng., Tech. Univ. Wroclaw, Poland
A. Kieda, Inst. of Control & Syst. Eng., Tech. Univ. Wroclaw, Poland pp. 0223
| Session C3: Usability Engineering |
J. Vanthienen, Dept. of Appl. Econ. Sci., Katholieke Univ., Leuven, Belgium
S. Poelmans, Dept. of Appl. Econ. Sci., Katholieke Univ., Leuven, Belgium pp. 0233
C.I.S. Arias, Sch. of Electr. Eng., State Univ. of Campinas, Brazil
B.M. Daltrini, Sch. of Electr. Eng., State Univ. of Campinas, Brazil pp. 0242
N. Dlodlo, Sch. of Comput. & Math. Sci., Liverpool John Moores Univ., UK
C. Bamford, Sch. of Comput. & Math. Sci., Liverpool John Moores Univ., UK pp. 0248
| Session D1: Logic Synthesis |
R. Rauscher, Dept. of Comput. Sci., Hamburg Univ., Germany
D. Klawan, Dept. of Comput. Sci., Hamburg Univ., Germany pp. 0259
R. Rauscher, Dept. of Comput. Sci., Hamburg Univ., Germany
A. Krause, Dept. of Comput. Sci., Hamburg Univ., Germany pp. 0267
H.-G. Martin, Dept. EAS Dresden, FhG IIS Erlangen, Dresden, Germany pp. 0275
| Session D2: Fault Tolerance |
Shang-Rong Tsai, Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan pp. 0285
| Session D3: Specification and Validation |
Yong Sun, Dept. of Comput. Sci., Queen's Univ., Belfast, UK
Hongji Yang, Dept. of Comput. Sci., Queen's Univ., Belfast, UK pp. 0303
I. Majzik, Dept. of Meas. & Instrum. Eng., Tech. Univ. Budapest, Hungary pp. 0311
| Session E1: Testing |
J. Sosnowski, Inst. of Comput. Sci., Warsaw Univ. of Technol., Poland
A. Kusmierczyk, Inst. of Comput. Sci., Warsaw Univ. of Technol., Poland pp. 0329
J.C. Cunha, Inst. Superior de Engenharia de Coimbra, Portugal
J.G. Silva, Inst. Superior de Engenharia de Coimbra, Portugal pp. 0343
R. Bevacqua, Dipartimento di Elettronica e Inf., Politecnico di Milano, Italy
L. Guerrazzi, Dipartimento di Elettronica e Inf., Politecnico di Milano, Italy
F. Fummi, Dipartimento di Elettronica e Inf., Politecnico di Milano, Italy pp. 0351
| Session E2: Dependable Systems |
A. Grnarov, Dept. of Comput. Sci., fac. of Electr. Eng., Skopje, Macedonia pp. 0363
B. Remy, LSR, IMAG, Grenoble, France pp. 0371
T. Bartha, Dept. of Meas. & Instrum. Eng., Tech. Univ. Budapest, Hungary pp. 0379
| Session E3: High-Speed Networks |
A. Tentov, Dept. of Comput. Sci., Univ. St. Kiril i Metodij, Skopje, Macedonia
A. Grnarov, Dept. of Comput. Sci., Univ. St. Kiril i Metodij, Skopje, Macedonia pp. 0390
Hoyoung Hwang, Dept. of Comput. Eng., Seoul Nat. Univ., South Korea
Hyoungjun Kim, Dept. of Comput. Eng., Seoul Nat. Univ., South Korea
Yanghee Choi, Dept. of Comput. Eng., Seoul Nat. Univ., South Korea
Chongsang Kim, Dept. of Comput. Eng., Seoul Nat. Univ., South Korea pp. 0397
| Session Fl: Memory Issues |
M. Kjelso, Electron. Syst. Design Group, Loughborough Univ. of Technol., UK
M. Gooch, Electron. Syst. Design Group, Loughborough Univ. of Technol., UK
S. Jones, Electron. Syst. Design Group, Loughborough Univ. of Technol., UK pp. 0423
P. Ibanez, Dept. de Inf. e Ingenieria de Sistemas, Zaragoza Univ., Spain
V. Vinals, Dept. de Inf. e Ingenieria de Sistemas, Zaragoza Univ., Spain pp. 0431
K. Ghose, Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA
K.R. Desai, Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA
P.M. Kogge, Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA pp. 0441
| Session F2: Distributed Systems |
E. Pagani, Dipartimento di Inf., Milan Univ., Italy
G.P. Rossi, Dipartimento di Inf., Milan Univ., Italy pp. 0451
G. Cabri, Dipartimento di Elettronica Inf. e Sistemistica, Bologna Univ., Italy
A. Corradi, Dipartimento di Elettronica Inf. e Sistemistica, Bologna Univ., Italy
F. Zambonelli, Dipartimento di Elettronica Inf. e Sistemistica, Bologna Univ., Italy pp. 0459
Han-Suk Choi, Dept. of Comput. Sci. & Stat., Mokpo Nat. Univ., Chonnam, South Korea
Jae Soo Yoo, Dept. of Comput. Sci. & Stat., Mokpo Nat. Univ., Chonnam, South Korea
Ok-Bae Chang, Dept. of Comput. Sci. & Stat., Mokpo Nat. Univ., Chonnam, South Korea pp. 0467
| Session F3: Formal Specification and Multimedia |
S. Fischer, Praktische Inf. IV, Mannheim Univ., Germany pp. 0476
Chie Dou, Dept. of Electr. Eng., Nat. Yunlin Inst. of Technol., Taiwan pp. 0484
M. Bettaz, Inst. d'Inf., Constantine Univ., Algeria
M. Maouche, Inst. d'Inf., Constantine Univ., Algeria pp. 0492
| Session G1: Co-Processors |
A. Postula, Dept. of Electr. & Comput. Eng., Queensland Univ., Brisbane, Qld., Australia
D. Abramson, Dept. of Electr. & Comput. Eng., Queensland Univ., Brisbane, Qld., Australia
P. Logothetis, Dept. of Electr. & Comput. Eng., Queensland Univ., Brisbane, Qld., Australia pp. 0501
J. Starner, Dept. of Real-Time Comput. Syst., Malardalens Univ., Vasteras, Sweden
J. Adomat, Dept. of Real-Time Comput. Syst., Malardalens Univ., Vasteras, Sweden
J. Furunas, Dept. of Real-Time Comput. Syst., Malardalens Univ., Vasteras, Sweden
L. Lindh, Dept. of Real-Time Comput. Syst., Malardalens Univ., Vasteras, Sweden pp. 0509
| Session G2 1: Image Processing |
P. Zemanek, Fac. of Electr. Eng., Czech Tech. Univ., Prague, Czech Republic pp. 0529
| Session G2 2: Parallel Software Engineering |
C. Rodriguez, Centro Superior de Inf., La Laguna Univ., Spain
J. Roda, Centro Superior de Inf., La Laguna Univ., Spain
F. Garcia, Centro Superior de Inf., La Laguna Univ., Spain
F. Almeida, Centro Superior de Inf., La Laguna Univ., Spain
D. Gonzalez, Centro Superior de Inf., La Laguna Univ., Spain pp. 0553
| Session 63: Operating System and Network Support |
A. Vina, Univ. Autonoma de Madrid, Spain pp. 0564
R. Hess, Dept. of Comput. Sci., Tech. Univ. Dresden, Germany
R. Lehmann, Dept. of Comput. Sci., Tech. Univ. Dresden, Germany
A. Schill, Dept. of Comput. Sci., Tech. Univ. Dresden, Germany pp. 0572
| Session H 1: Novel Processor Architectures |
W. Grunewald, Dept. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany
T. Ungerer, Dept. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany pp. 0592
C. Piguet, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
T. Schneider, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
J.-M. Masgonty, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
C. Arm, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
S. Durand, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland
M. Stegers, Centre Suisse d'Electronique et de Microtechnique SA, Neuchatel, Switzerland pp. 0600
K. Ghose, Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA
P. Vasek, Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA pp. 0606
| Session H3: Operational Considerations |
T. Pyssysalo, Digital Syst. Lab., Helsinki Univ. of Technol., Espoo, Finland
L. Ojala, Digital Syst. Lab., Helsinki Univ. of Technol., Espoo, Finland pp. 0625
F. Thiesse, Inst. Eurecom, Sophia Antipolis, France pp. 0633
| Session 11: Superscalar Architectures |
E.M.C. Filho, COPPE, Univ. Federal do Rio de Janeiro, Brazil
A. Wolfe, COPPE, Univ. Federal do Rio de Janeiro, Brazil pp. 0651 Usage of this product signifies your acceptance of the Terms of Use.
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