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Seventh IEEE European Test Workshop (ETW'02)
Corfu, Greece
May 26-May 29
ISBN: 0-7695-1715-3
Table of Contents
Introduction
Keynote Address
SoC Test
Defect Based Testing
M. Renovell, Universit? de Montpellier II
J. M. Gallière, Universit? de Montpellier II
F. Azaïs, Universit? de Montpellier II
Y. Bertrand, Universit? de Montpellier II
pp. 15
Verification
Srikanth Arekapudi, University of Massachusetts at Amherst
Fei Xin, University of Massachusetts at Amherst
Jinzheng Peng, University of Massachusetts at Amherst
Ian G. Harris, University of Massachusetts at Amherst
pp. 23
BIST and TRP
Lars Schäfer, University of Stuttgart
Rainer Dorsch, University of Stuttgart
Hans-Joachim Wunderlich, University of Stuttgart
pp. 37
Delay Testing
Xiao Liu, Virginia Tech
Michael S. Hsiao, Virginia Tech
Sreejit Chakravarty, Intel Corporation
Paul J Thadikaran, Intel Corporation
pp. 47
Yun Shao, University of Iowa
Sudhakar M. Reddy, University of Iowa
Irith Pomeranz, Purdue University
Seiji Kajihara, Kyushu Institute of Technology
pp. 53
System Test and Debug
Industrial Experiences: Bridging Faults and Current Test
Testing Data Converters and PLLs
S. Bernard, University of Montpellier
F. Azaïs, University of Montpellier
Y. Bertrand, University of Montpellier
M. Renovell, University of Montpellier
pp. 89
Industrial Experiences: DFT and BIST
Power Conscious Testing
Ozgur Sinanoglu, University of California at San Diego
Ismet Bayraktaroglu, University of California at San Diego
Alex Orailoglu, University of California at San Diego
pp. 113
Erik Larsson, Nara Institute of Science and Technology
Hideo Fujiwara, Nara Institute of Science and Technology
pp. 119
Author Index
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