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European Test Workshop, IEEE (2000)
Cascais, Portugal
May 23, 2000 to May 26, 2000
ISBN: 0-7695-0701-8
TABLE OF CONTENTS
pp. xii
Session 1A Delay Testing and Test Scheduling
H. G. Kerkhoff , University of Twente
M. Sachdev , University of Waterloo
H. Speek , University of Twente
pp. 3
P. Girard , Universit? Montpellier II
C. Landrault , Universit? Montpellier II
A. Virazel , Universit? Montpellier II
R. David , INPG - CNRS - UJF
pp. 9
Session 1B Scan and Functional Testing
Session 2A System Testing
M. Rebaudengo , Politecnico di Torino
M. Sonza Reorda , Politecnico di Torino
M. Violante , Politecnico di Torino
M. Lajolo , NEC USA
pp. 25
Session 3A IDDQ Testing
Antoni Ferré , Universitat Polit?cnica de Catalunya
Joan Figueras , Universitat Polit?cnica de Catalunya
pp. 33
Session 6A Analog and Mixed-Signal Testing
S. Bernard , University of Montpellier
Y. Bertrand , University of Montpellier
M. Renovell , University of Montpellier
pp. 53
Session 7A Fault Simulation and FPGA Testing
Bernd Becker , Albert-Ludwigs-University
Piet Engelke , Albert-Ludwigs-University
pp. 63
M. Lobur , State University ?Lvivska Politechnika?
T. Cibaková , Institute of Informatics at Bratislava
E. Gramatová , Institute of Informatics at Bratislava
W. Kuzmicz , Warsaw University of Technology
W. Pleskacz , Warsaw University of Technology
M. Blyzniuk , State University ?Lvivska Politechnika?
R. Ubar , Tallinn Technical University
pp. 69
Session 7B Challenges in Deep Sub-Micron Testing
Sanjay Sengupta , Intel Corporation
Sandip Kundu , Intel Corporation
pp. 83
Dirk Merlier , Alcatel Microelectronics
Anton Chichkov , Alcatel Microelectronics
pp. 91
Session 9A High Level Test
X. Yu , University of Illinois at Urbana-Champaign
E.M. Rudnick , University of Illinois at Urbana-Champaign
M. Boschini , ST Microelectronics
pp. 105
Yiorgos Makris , University of California at San Diego
Jamison Collins , University of California at San Diego
Alex Orailoglu , University of California at San Diego
pp. 111
Session 9B Memory Testing
Alfredo Benso , Politecnico di Torino
Silvia Chiusano , Politecnico di Torino
Stefano di Carlo , Politecnico di Torino
Giorgio di Natale , Politecnico di Torino
Monica Lobetti Bodoni , Siemens Information and Communication Networks S.p.A.
pp. 119
Thomas Hladschik , White Oak Semiconductor
Jörg Vollrath , White Oak Semiconductor
pp. 125
Session 10A BIST and Concurrent Testing
M.L. Flottes , Universit? de Montpellier 2
B. Rouzeyre , Universit? de Montpellier 2
pp. 133
Ismet Bayraktaroglu , University of California at San Diego
Alex Orailoglu , University of California at San Diego
pp. 140
Session 10B Board Testing
Session 11 BIST Architecture
Andrzej Hlawiczka , Silesian University of Technology
Tomasz Garbolino , Silesian University of Technology
pp. 161
F. Corno , Politecnico di Torino
M. Sonza Reorda , Politecnico di Torino
G. Squillero , Politecnico di Torino
M. Violante , Politecnico di Torino
pp. 167
Embedded Tutorials
Author Index (PDF)
pp. 181
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