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European Test Workshop, IEEE (1999)
Stuttgart, Germany
Sept. 24, 1999 to Sept. 27, 1999
ISBN: 0-7695-0390-X
TABLE OF CONTENTS
Foreword (PDF)
pp. viii
pp. ix
pp. xii
BIST: From Basics to Application
S. Cataldo , Politecnico di Torino
S. Chiusano , Politecnico di Torino
P. Prinetto , Politecnico di Torino
A. Benso , Politecnico di Torino
pp. 2
C. Fagot , Universit? Montpellier II / CNRS
P. Girard , Universit? Montpellier II / CNRS
C. Landrault , Universit? Montpellier II / CNRS
pp. 7
A. Schubert , University of Bremen
W. Anheier , University of Bremen
pp. 15
Functional and Structural Testing of Analog Circuits
M. Renovell , University of Montpellier
F. Azaïs , University of Montpellier
J-C. Bodin , University of Montpellier
Y. Bertrand , University of Montpellier
pp. 22
R.J.W.T. Tangelder , University of Twente
N. Engin , University of Twente
R.H. Beurze , University of Twente
R. Van Kleef , Philips Semiconductors
pp. 28
IDDx Testing
M. Roca , University of the Balearic Islands
E. Isern , University of the Balearic Islands
J. Segura , University of the Balearic Islands
R. Picos , University of the Balearic Islands
pp. 46
Testing MEMs and Switched Capacitors
Chung Len Lee , National Chiao Tung University
Soon-Jyh Chang , National Chiao Tung University
Jwu E. Chen , Chung-Hua Polytechnic Institute
pp. 58
Industrial Experiences and Challenges
Erik Jan Marinissen , Philips Research Laboratories
Maurice Lousberg , Philips Electronic Design & Tools
pp. 70
Harald Vranken , Philips Research Laboratories
pp. 76
ATPG and Fault Modeling
Jaan Raik , Tallinn Technical University
Raimund Ubar , Tallinn Technical University
pp. 84
BIST for Sequential Circuits and Delay Faults
Martin Keim , Albert-Ludwigs-University
Ilia Polian , Albert-Ludwigs-University
Harry Hengster , Albert-Ludwigs-University
Bernd Becker , Albert-Ludwigs-University
pp. 98
Gundolf Kiefer , University of Stuttgart
pp. 110
Fault Simulation and Fault Coverage of Analog Circuits
Anna M. Brosa , Universitat Politecnica de Catalunya
pp. 123
From System Level to Defect Oriented Test
M.B. Santos , Universidade T?cnica de Lisboa
I.M. Teixeira , Universidade T?cnica de Lisboa
J. Semião , Universidade do Algarve
pp. 136
Testing FPGAs and Regular Arrays
Abderrahim Doumar , Chiba University
Toshiaki Ohmameuda , Chiba University
Hideo Ito , Chiba University
pp. 152
Low Power BIST
M. Rebaudengo , Politenico di Torino
M. Sonza Reorda , Politenico di Torino
M. Violante , Politenico di Torino
pp. 160
Author Index (PDF)
pp. 171
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