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12th IEEE European Test Symposium (ETS'07)
Freiburg, Germany
May 20-May 24
ISBN: 0-7695-2827-9
Table of Contents
Introduction
Plenary Presentations
Fault and Defect Diagnosis
A. Rousset, Universite Montpellier II/CNRS, France
A. Bosio, Universite Montpellier II/CNRS, France
P. Girard, Universite Montpellier II/CNRS, France
C. Landrault, Universite Montpellier II/CNRS, France
S. Pravossoudovitch, Universite Montpellier II/CNRS, France
A. Virazel, Universite Montpellier II/CNRS, France
pp. 13-20
Mixed Signal DFT and Test
Erik Schuler, Universidade Federal do Rio Grande do Sul, Brazil
Marcelo Negreiros, Universidade Federal do Rio Grande do Sul, Brazil
Pascal Nouet, Laboratoire d'Informatique, de Robotique et de Microelectronique de Montpellier, France
Luigi Carro, Universidade Federal do Rio Grande do Sul, Brazil
pp. 21-28
NoC Testing
Jaan Raik, Tallinn University of Technology, Estonia
Raimund Ubar, Tallinn University of Technology, Estonia
Vineeth Govind, Tallinn University of Technology, Estonia
pp. 29-34
Fawnizu Azmadi Hussin, Nara Institute of Science and Technology, Japan
Tomokazu Yoneda, Nara Institute of Science and Technology, Japan
Hideo Fujiwara, Nara Institute of Science and Technology, Japan
pp. 35-42
Advances in RF Test
Ivo Koren, Infineon Technologies AG, Germany
Frank Demmerle, Infineon Technologies AG, Germany
Roland May, Infineon Technologies AG, Germany
Martin Kaibel, Infineon Technologies AG, Germany
Sebastian Sattler, Infineon Technologies AG, Germany
pp. 43-48
Marcelo Negreiros, Universidade Federal do Rio Grande do Sul, Brazil
Luigi Carro, Universidade Federal do Rio Grande do Sul, Brazil
Altamiro A. Susin, Universidade Federal do Rio Grande do Sul, Brazil
pp. 49-54
Shaji Krishnan, NXP Semiconductors, The Netherlands
Rene Jonker, NXP Semiconductors, The Netherlands
Leon van de Logt, NXP Semiconductors, The Netherlands
pp. 55-62
Diagnosis and Debug
Bart Vermeulen, NXP Semiconductors Research, The Netherlands
Kees Goossens, NXP Semiconductors Research, The Netherlands; Technical University Delft, The Netherlands
Remco van Steeden, Technical University of Twente, The Netherlands
Martijn Bennebroek, Philips Research, The Netherlands
pp. 69-76
Simulation and Verification
O. Ginez, Universite de Montpellier II/CNRS, France; ATMEL Rousset, France
J.-M. Daga, ATMEL Rousset, France
P. Girard, Universite de Montpellier II/CNRS, France
C. Landrault, Universite de Montpellier II/CNRS, France
S. Pravossoudovitch, Universite de Montpellier II/CNRS, France
A. Virazel, Universite de Montpellier II/CNRS, France
pp. 77-84
Memory Test
Said Hamdioui, Delft University of Technology, The Netherlands
Zaid Al-Ars, Delft University of Technology, The Netherlands
Javier Jimenez, Design of Systems on Silicon (DS2), Spain
Jose Calero, Design of Systems on Silicon (DS2), Spain
pp. 85-90
Philipp Ohler, University of Paderborn, Germany
Sybille Hellebrand, University of Paderborn, Germany
Hans-Joachim Wunderlich, University of Stuttgart, Germany
pp. 91-96
A. Ney, Universite de Montpellier II/CNRS, France
P. Girard, Universite de Montpellier II/CNRS, France
C. Landrault, Universite de Montpellier II/CNRS, France
S. Pravossoudovitch, Universite de Montpellier II/CNRS, France
A. Virazel, Universite de Montpellier II/CNRS, France
M. Bastian, Infineon Technologies, France
pp. 97-104
On-Line Testing and Self-Test
N. Dumas, Lancaster University, UK
Z. Xu, Lancaster University, UK
K. Georgopoulos, Lancaster University, UK
R.J.T. Bunyan, QinetiQ, UK
A. Richardson, Lancaster University, UK
pp. 105-110
A. Merentitis, University of Athens, Greece
N. Kranitis, University of Athens, Greece
A. Paschalis, University of Athens, Greece
D. Gizopoulos, University of Piraeus, Greece
pp. 111-116
Tomoo Inoue, Hiroshima City University, Japan
Takashi Fujii, Hiroshima City University, Japan
Hideyuki Ichihara, Hiroshima City University, Japan
pp. 117-124
Fault Grading and Test Quality
Raimund Ubar, Tallinn University of Technology, Estonia
Sergei Devadze, Tallinn University of Technology, Estonia
Jaan Raik, Tallinn University of Technology, Estonia
Artur Jutman, Tallinn University of Technology, Estonia
pp. 131-136
Rene Krenz-Baath, NXP Semiconductors, Germany
Andreas Glowatz, NXP Semiconductors, Germany
Juergen Schloeffel, NXP Semiconductors, Germany
pp. 137-144
Diagnosis and Yield Improvement
Huaxing Tang, Mentor Graphics Corporation, USA
Sharma Manish, Mentor Graphics Corporation, USA
Janusz Rajski, Mentor Graphics Corporation, USA
Martin Keim, Mentor Graphics Corporation, USA
Brady Benware, Mentor Graphics Corporation, USA
pp. 145-150
Single Event Upsets
C.A. Lisboa, Universidade Federal do Rio Grande do Sul, Brazil
M.I. Erigson, Universidade Federal do Rio Grande do Sul, Brazil
L. Carro, Universidade Federal do Rio Grande do Sul, Brazil
pp. 165-172
Delay and Performance Test
Sankar Gurumurthy, The University of Texas at Austin, USA
Ramtilak Vemu, The University of Texas at Austin, USA
Jacob A. Abraham, The University of Texas at Austin, USA
Daniel G. Saab, Case Western Reserve University
pp. 173-178
P. Bernardi, Politecnico di Torino, Italy
M. Grosso, Politecnico di Torino, Italy
E. Sanchez, Politecnico di Torino, Italy
M. Sonza Reorda, Politecnico di Torino, Italy
pp. 179-184
Embedded Tutorials
P. Cauvet, NXP Semiconductors, France
S. Bernard, LIRMM, University of Montpellier/CNRS, France
M. Renovell, LIRMM, University of Montpellier/CNRS, France
pp. 193-199
Klaus Luther, Infineon Technologies AG, Germany
pp. 200
Nicola Nicolici, McMaster University, Canada
Xiaoqing Wen, Kyushu Institute of Technology, Japan
pp. 202-210
ETS06 Best Paper
V. Kerzerho, LIRMM, University of Montpellier/CNRS, France; Philips France Semiconducteurs
P. Cauvet, Philips France Semiconducteurs
S. Bernard, LIRMM, University of Montpellier/CNRS, France
F. Azais, LIRMM, University of Montpellier/CNRS, France
M. Comte, LIRMM, University of Montpellier/CNRS, France
M. Renovell, LIRMM, University of Montpellier/CNRS, France
pp. 211-216
Author Index
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