- E
- ETS
- 2006
- Eleventh IEEE European Test Symposium (ETS'06)
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Eleventh IEEE European Test Symposium (ETS'06) Southampton, United Kingdom May 21-May 21 ISBN: 0-7695-2566-0 Table of Contents
 | Introduction |
 | Plenary Presentations |
 | Delay Fault Testing |
 | Single-Event Upsets |
 | Memory Testing - 1 |
Jin-Fu Li, National Central University, Taiwan pp. 55-62
 | Test of Reconfiguration Systems |
L. Entrena, Universidad Carlos III de Madrid, Spain pp. 75-82
 | Memory Testing - 2 |
Qiang Xu, The Chinese University of Hong Kong pp. 83-88
 | Test and Measurement |
 | BIST and Test Data Compression for Logic |
 | Test of Sigma-Delta Modulators |
Gildas Leger, Instituto de Microelectr?nica de Sevilla (IMSE-CNM), Spain pp. 131-136
Erik Sch?, Universidade Federal do Rio Grande do Sul, Brazil
Luigi Carro, Universidade Federal do Rio Grande do Sul, Brazil pp. 137-144
 | Current-Based and Power Switch Testing |
 | Test of AD and DA Circuits |
P. Cauvet, Philips France Semiconducteurs, France
F. Aza?, University of Montpellier, France
M. Comte, University of Montpellier, France pp. 159-164
Mike Atia, National Semiconductor Corporation, USA pp. 165-172
 | Automatic Test Pattern Generation |
 | Advanced Analog Testing |
B. Agnus, Philips France Semiconducteurs, France
Ph. Cauvet, Philips France Semiconducteurs, France
Ph. Gandy, Philips France Semiconducteurs, France pp. 193-198
 | Test of Asynchronous and NOC Circuitry |
D. Shang, University of Newcastle upon Tyne, UK
F. Burns, University of Newcastle upon Tyne, UK
F. Xia, University of Newcastle upon Tyne, UK pp. 225-232
 | Diagnosis |
 | Embedded Tutorials |
Tino Heijmen, Philips Research Laboratories, The Netherlands pp. 247-252
 | Author Index | Usage of this product signifies your acceptance of the Terms of Use.
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