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Ninth IEEE European Test Symposium (ETS'04)
Corsica, France
May 23-May 26
ISBN: 0-7695-2119-3
Table of Contents
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Foreword (PDF)
pp. viii-viii
Debug and Diagnosis
Analog Measurement Techniques
O. Petre, MESA+ Research Institute, The Netherlands
H. G. Kerkhoff, MESA+ Research Institute, The Netherlands
pp. 10-15
Tian Xia, Univ. of Vermont, Burlington, VT
Peilin Song, IBM T.J. Watson Research Center, Yorktown Heights, NY
Keith A. Jenkins, IBM T.J. Watson Research Center, Yorktown Heights, NY
Jien-Chung Lo, Univ. of Rhode Island, Kingston
pp. 16-21
Design for Dependability
D. Marienfeld, University of Potsdam, Germany
E. S. Sogomonyan, University of Potsdam, Germany
V. Ocheretnij, University of Potsdam, Germany
M. G?ssel, University of Potsdam, Germany
pp. 30-35
ATE Hardware and Software
Bruce R. Parnas, Advantest R&D Center Inc.
Ankan Pramanick, Advantest R&D Center Inc.
Mark Elston, Advantest R&D Center Inc.
Toshiaki Adachi, Advantest R&D Center Inc.
pp. 38-43
Timing and Delay Testing
Ramyanshu Datta, The University of Texas at Austin
Antony Sebastine, The University of Texas at Austin
Jacob A. Abraham, The University of Texas at Austin
pp. 46-51
Patrick Girard, Universit? Montpellier II / CNRS, France
Olivier H?ron, Universit? Montpellier II / CNRS, France
Serge Pravossoudovitch, Universit? Montpellier II / CNRS, France
Michel Renovell, Universit? Montpellier II / CNRS, France
pp. 52-57
MEMS Testing
N. Dumas, Universit? de Montpellier II / CNRS, France
F. Aza?, Universit? de Montpellier II / CNRS, France
L. Latorre, Universit? de Montpellier II / CNRS, France
P. Nouet, Universit? de Montpellier II / CNRS, France
pp. 60-65
A. Dhayni, TIMA Laboratory, France
S. Mir, TIMA Laboratory, France
L. Rufer, TIMA Laboratory, France
pp. 66-71
Embedded Core Testing
Ludovic Krundel, Universit? Montpellier II, France
Sandeep Kumar Goel, Philips Research Laboratories, The Netherlands
Erik Jan Marinissen, Philips Research Laboratories, The Netherlands
Marie-Lise Flottes, LIRMM, France
Bruno Rouzeyre, LIRMM, France
pp. 80-85
Ozgur Sinanoglu, University of California, San Diego
Alex Orailoglu, University of California, San Diego
pp. 86-91
Test Resource Partitioning
Fault Simulation and Verification
Seiji Kajihara, Kyushu Institute of Technology, Japan
Kewal K. Saluja, University of Wisconsin-Madison
Sudhakar M. Reddy, University of Iowa, Iowa City
pp. 108-113
Victor Avenda?, Optics and Electronics-INAOE, Puebla, Mexico
Victor Champac, Optics and Electronics-INAOE, Puebla, Mexico
Joan Figueras, Universitat Politecnica de Catalunya-UPC, Barcelona, Spain
pp. 114-119
Analog BIST
Marcelo Negreiros, Universidade Federal do Rio Grande do Sul, Brazil
Luigi Carro, Universidade Federal do Rio Grande do Sul, Brazil
Altamiro A. Susin, Universidade Federal do Rio Grande do Sul, Brazil
pp. 122-126
Jee-Youl Ryu, Arizona State University, Tempe, AZ
Bruce C. Kim, Arizona State University, Tempe, AZ
Iboun Sylla, Texas Instruments, Inc., Dallas, Texas
pp. 127-132
Memory Testing
Luigi Dilillo, Universit? de Montpellier II / CNRS, France
Patrick Girard, Universit? de Montpellier II / CNRS, France
Serge Pravossoudovitch, Universit? de Montpellier II / CNRS, France
Arnaud Virazel, Universit? de Montpellier II / CNRS, France
Simone Borri, Infineon Technologies France
Magali Hage-Hassan, Infineon Technologies France
pp. 140-145
Ad J. van de Goor, Delft University of Technology, The Netherlands
Said Hamdioui, Philips Semiconductor Crolles R&D, France; Delft University of Technology, The Netherlands
Zaid Al-Ars, CatRam Solutions, The Netherlands; Delft University of Technology, The Netherlands
pp. 146-151
ATPG and High-Level Test
Piet Engelke, Albert-Ludwigs-University, Germany
Ilia Polian, Albert-Ludwigs-University, Germany
Michel Renovell, LIRMM - UMII, France
Bernd Becker, Albert-Ludwigs-University, Germany
pp. 160-165
Advances in DfT
Tsuyoshi Iwagaki, Nara Institute of Science and Technology, Japan
Satoshi Ohtake, Nara Institute of Science and Technology, Japan
Hideo Fujiwara, Nara Institute of Science and Technology, Japan
pp. 168-173
Y. Bonhomme, Nara Institute of Science and Technology
T. Yoneda, Nara Institute of Science and Technology
H. Fujiwara, Nara Institute of Science and Technology
P. Girard, Universit? Montpellier II/CNRS, France
pp. 174-179
Author Index (PDF)
pp. 180-181
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