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2012 Ninth European Dependable Computing Conference
Designing Robust GALS Circuits with Triple Modular Redundancy
Sibiu, Romania
May 08-May 11
ISBN: 978-0-7695-4671-1
| ASCII Text | x | ||
| Jakob Lechner, "Designing Robust GALS Circuits with Triple Modular Redundancy," European Dependable Computing Conference, pp. 227-236, 2012 Ninth European Dependable Computing Conference, 2012. | |||
| BibTex | x | ||
| @article{ 10.1109/EDCC.2012.25, author = {Jakob Lechner}, title = {Designing Robust GALS Circuits with Triple Modular Redundancy}, journal ={European Dependable Computing Conference}, volume = {0}, year = {2012}, isbn = {978-0-7695-4671-1}, pages = {227-236}, doi = {http://doi.ieeecomputersociety.org/10.1109/EDCC.2012.25}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - European Dependable Computing Conference TI - Designing Robust GALS Circuits with Triple Modular Redundancy SN - 978-0-7695-4671-1 SP227 EP236 A1 - Jakob Lechner, PY - 2012 KW - Asynchronous circuit design KW - Fault-tolerance KW - GALS KW - TMR KW - Redundant clocking VL - 0 JA - European Dependable Computing Conference ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EDCC.2012.25
In this paper we describe a new method for building fault-tolerant globally asynchronous locally synchronous (GALS) systems based on triple modular redundancy. In order to avoid a single point of failure, we present a redundant clocking scheme for providing independent clock signals to the triplicated GALS modules. Independent clocking, however, requires the use of an alternative recovery mechanism, which performs voting only at certain safe synchronization points. An implementation of an asynchronous state machine controlling this recovery process is given and thoroughly evaluated concerning its robustness against soft-errors. With the help of model checking the fault-resilience of the proposed circuit is formally verified. A case study, including a description for the design automation of GALS-based TMR systems, shows the viability of the new architecture. The resulting solution offers low area overheads and a competitive performance compared to standard TMR approaches.
Index Terms:
Asynchronous circuit design, Fault-tolerance, GALS, TMR, Redundant clocking
Citation:
Jakob Lechner, "Designing Robust GALS Circuits with Triple Modular Redundancy," edcc, pp.227-236, 2012 Ninth European Dependable Computing Conference, 2012
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