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2009 First IEEE Eastern European Conference on the Engineering of Computer Based Systems
Partitioning DSP Applications on a Multi-core Architecture Based on Load Balancing
Novi Sad, Serbia
September 07-September 08
ISBN: 978-0-7695-3759-7
| ASCII Text | x | ||
| Marija Tadic, Jelena Kovacevic, "Partitioning DSP Applications on a Multi-core Architecture Based on Load Balancing," Engineering of Computer Based Systems, IEEE Eastern European Conference on the, pp. 154-155, 2009 First IEEE Eastern European Conference on the Engineering of Computer Based Systems, 2009. | |||
| BibTex | x | ||
| @article{ 10.1109/ECBS-EERC.2009.24, author = {Marija Tadic and Jelena Kovacevic}, title = {Partitioning DSP Applications on a Multi-core Architecture Based on Load Balancing}, journal ={Engineering of Computer Based Systems, IEEE Eastern European Conference on the}, volume = {0}, year = {2009}, isbn = {978-0-7695-3759-7}, pages = {154-155}, doi = {http://doi.ieeecomputersociety.org/10.1109/ECBS-EERC.2009.24}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - CONF JO - Engineering of Computer Based Systems, IEEE Eastern European Conference on the TI - Partitioning DSP Applications on a Multi-core Architecture Based on Load Balancing SN - 978-0-7695-3759-7 SP154 EP155 A1 - Marija Tadic, A1 - Jelena Kovacevic, PY - 2009 KW - DSP KW - optimization KW - load balancing VL - 0 JA - Engineering of Computer Based Systems, IEEE Eastern European Conference on the ER - | |||
In this paper, we describe the technique for optimization of demanding DSP applications on a dual core DSP-s. In addition to common techniques of optimization, we use the Advanced Multi-core Optimization Technique, resolving load balancing problem. The methodology of the proposed technique is based on the application partitioning on two cores, assuming algorithm and processor architecture understanding. To verify the described technique we used one class of lossless audio decoder on CS4953xx dual core processor.
Index Terms:
DSP, optimization, load balancing
Citation:
Marija Tadic, Jelena Kovacevic, "Partitioning DSP Applications on a Multi-core Architecture Based on Load Balancing," ecbs-eerc, pp.154-155, 2009 First IEEE Eastern European Conference on the Engineering of Computer Based Systems, 2009
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