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2011 14th Euromicro Conference on Digital System Design
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2011 14th Euromicro Conference on Digital System Design
Oulu, Finland
August 31-September 02
ISBN: 978-0-7695-4494-6
Table of Contents
Papers
[Front cover]
(PDF)
pp. C1
ABSTRACT
PDF
Title Page i
(PDF)
pp. i
ABSTRACT
PDF
Title Page iii
(PDF)
pp. iii
ABSTRACT
PDF
[Copyright notice]
(PDF)
pp. iv
ABSTRACT
PDF
Table of contents
(PDF)
pp. v-xv
ABSTRACT
PDF
Message from the Program Chair
(PDF)
pp. xvi-xvii
ABSTRACT
PDF
Conference Committees
(PDF)
pp. xviii-xxiii
ABSTRACT
PDF
Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care (Abstract)
(Abstract)
Harmke de Groot
pp. 3
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Human++: Key Challenges and Trade-offs in Embedded System Design for Personal Health Care
(Abstract)
Harmke de Groot
Maryam Ashouei
Julien Penders
Valer Pop
Maja Vidojkovic
Bert Gyselinckx
Firat Yazicioglu
pp. 4-10
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Cryptographic Contests: Toward Fair and Comprehensive Benchmarking of Cryptographic Algorithms in Hardware (Abstract)
(Abstract)
Kris Gaj
pp. 11
ABSTRACT
PDF
PURCHASE ARTICLE: $19
The Future of Data-Parallel Embedded Systems (Abstract)
(Abstract)
Menno M. Lindwer
pp. 12
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Generalized If-Then-Else Operator for Compact Polynomial Representation of Multi Output Functions
(Abstract)
Ilya Levin
Osnat Keren
pp. 15-20
ABSTRACT
PDF
PURCHASE ARTICLE: $19
On the Cascade Implementation of Multiple-Output Sparse Logic Functions
(Abstract)
V´clav Dvor´k
Petr Mikušek
pp. 21-28
ABSTRACT
PDF
PURCHASE ARTICLE: $19
On Failure Rate Assessment Using an Executable Model of the System
(Abstract)
Mohammad Hossein Neishaburi
Zeljko Zilic
pp. 29-36
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Cost Effective Centralized Adaptive Routing for Networks-on-Chip
(Abstract)
Ran Manevich
Israel Cidon
Avinoam Kolodny
Isask'har Walter
Shmuel Wimer
pp. 39-46
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems
(Abstract)
Abdul Naeem
Axel Jantsch
Xiaowen Chen
Zhonghai Lu
pp. 47-54
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design
(Abstract)
Mansour Shafaei
Ahmad Patooghy
Seyed Ghassem Miremadi
pp. 55-62
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Fast Congestion-Aware Flow Control Mechanism for ID-Based Networks-on-Chip with Best-Effort Communication
(Abstract)
Haoyuan Ying
Ashok Jaiswal
Thomas Hollstein
Klaus Hofmann
pp. 63-70
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Optimal Selection of Function Implementation in a Hierarchical Configware Synthesis Method for a Coarse Grain Reconfigurable Architecture
(Abstract)
Fahimeh Jafari
Shuo Li
Ahmed Hemani
pp. 73-80
ABSTRACT
PDF
PURCHASE ARTICLE: $19
VMAP: A Variation Map-Aware Placement Algorithm for Leakage Power Reduction in FPGAs
(Abstract)
Behzad Salami
Morteza Saheb Zamani
Ali Jahanian
pp. 81-87
ABSTRACT
PDF
PURCHASE ARTICLE: $19
PUMA: Placement Unification with Mapping and Guaranteed Throughput Allocation on an FPGA Using a Hardwired NoC
(Abstract)
Muhammad Aqeel Wahlah
Kees Goossens
pp. 88-96
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Improved Power Modeling of DDR SDRAMs
(Abstract)
Karthik Chandrasekar
Benny Akesson
Kees Goossens
pp. 99-108
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Path-Based Dynamic Voltage and Frequency Scaling Algorithms for Multiprocessor Embedded Applications with Soft Delay Deadlines
(Abstract)
Alice M. Tokarnia
Pedro C. F. Pepe
Leandro D. Pagotto
pp. 109-116
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Power Minimisation for Real-Time Dataflow Applications
(Abstract)
Andrew Nelson
Orlando Moreira
Anca Molnos
Sander Stuijk
Ba Thang Nguyen
Kees Goossens
pp. 117-124
ABSTRACT
PDF
PURCHASE ARTICLE: $19
VHDL Code Generation from Formal Event-B Models
(Abstract)
Sergey Ostroumov
Leonidas Tsiopoulos
pp. 127-134
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Process Variation Reduction for CMOS Logic Operating at Sub-threshold Supply Voltage
(Abstract)
Bo Liu
Hamid Reza Pourshaghaghi
Sebastian Moreno Londoño
José Pineda de Gyvez
pp. 135-139
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Hardware Reuse in Modern Application-Specific Processors and Accelerators
(Abstract)
Alexandre S. Nery
Lech Jozwiak
Menno Lindwer
Mauro Cocco
Nadia Nedjah
Felipe M.G. França
pp. 140-147
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Quaternary High Performance Arithmetic Logic Unit Design
(Abstract)
A.N. Nagamani
S. Nishchai
pp. 148-153
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers
(Abstract)
Jean Michel Chabloz
Ahmed Hemani
pp. 157-164
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Towards an Efficient NoC Topology through Multiple Injection Ports
(Abstract)
Jesús Camacho
José Flich
José Duato
Hans Eberle
Wladek Olesinski
pp. 165-172
ABSTRACT
PDF
PURCHASE ARTICLE: $19
LastZ: An Ultra Optimized 3D Networks-on-Chip Architecture
(Abstract)
Amir-Mohammad Rahmani
Pasi Liljeberg
Juha Plosila
Hannu Tenhunen
pp. 173-180
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Comparison of Different Thread Scheduling Strategies for Asymmetric Chip MultiThreading Architectures in Embedded Systems
(Abstract)
Charly Bechara
Nicolas Ventroux
Daniel Etiemble
pp. 181-187
ABSTRACT
PDF
PURCHASE ARTICLE: $19
SAT-Based Generation of Compressed Skewed-Load Tests for Transition Delay Faults
(Abstract)
Roland Dobai
Marcel Bal´ž
pp. 191-196
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Adaptive Temperature-Aware SoC Test Scheduling Considering Process Variation
(Abstract)
Nima Aghaee
Zebo Peng
Petru Eles
pp. 197-204
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles
(Abstract)
Richard Ruzicka
Vaclav Simek
pp. 205-212
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Technique for Accelerating Injection of Transient Faults in Complex SoCs
(Abstract)
Alireza Rohani
Hans G. Kerkhoff
pp. 213-220
ABSTRACT
PDF
PURCHASE ARTICLE: $19
SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems
(Abstract)
Martin Straka
Jan Kastil
Zdenek Kotasek
pp. 223-230
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Fault Tolerance of Multiple Logic Faults in SRAM-Based FPGA Systems
(Abstract)
Farid Lahrach
Abderrahim Doumar
Eric Châtelet
pp. 231-238
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Reliability-Aware Design Optimization for Multiprocessor Embedded Systems
(Abstract)
Jia Huang
Jan Olaf Blech
Andreas Raabe
Christian Buckl
Alois Knoll
pp. 239-246
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Design of Asynchronous Circuits on FPGAs for Soft Error Tolerance
(Abstract)
Yu Bai
Weidong Kuang
pp. 247-253
ABSTRACT
PDF
PURCHASE ARTICLE: $19
HMMER Performance Model for Multicore Architectures
(Abstract)
Sebastian Isaza
Ernst Houtgast
Georgi Gaydadjiev
pp. 257-261
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI
(Abstract)
Antti Kamppi
Lauri Matilainen
Joni-Matti Määttä
Erno Salminen
Timo D. Hämäläinen
Marko Hännikäinen
pp. 262-265
ABSTRACT
PDF
PURCHASE ARTICLE: $19
10-Gigabit Throughput and Low Area for a Hardware Implementation of the Advanced Encryption Standard
(Abstract)
Paolo Maistri
Régis Leveugle
pp. 266-269
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Multicore Cache Simulations Using Heterogeneous Computing on General Purpose and Graphics Processors
(Abstract)
Georgios Keramidas
Nikolaos Strikos
Stefanos Kaxiras
pp. 270-273
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Power Spectral Density Side Channel Attack Overlapping Window Method
(Abstract)
Philip Hodgers
Kean Hong Boey
Maire O'Neill
pp. 274-278
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Dynamic Power Estimation for Motion Estimation Hardware
(Abstract)
Caglar Kalaycioglu
Ilker Hamzaoglu
pp. 279-282
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Module for Packet Hijacking in NetFPGA Platform
(Abstract)
Alfio Lombardo
Carla Panarello
Diego Reforgiato
Enrico Santagati
Giovanni Schembra
pp. 283-286
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Fault Models Usability Study for On-line Tested FPGA
(Abstract)
Jaroslav Borecký
Martin Kohlík
Pavel Kubalík
Hana Kub´tov´
pp. 287-290
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Hardware Implementation of a Flexible Tag Platform for Passive RFID Devices
(Abstract)
Thomas Plos
Martin Feldhofer
pp. 293-300
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder
(Abstract)
Jiaoyan Chen
Dilip Vasudevan
Emanuel Popovici
Michel Schellekens
pp. 301-308
ABSTRACT
PDF
PURCHASE ARTICLE: $19
An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion
(Abstract)
Tevfik Zafer Ozcan
Cagla Cakir
Mert Cetin
Ilker Hamzaoglu
pp. 309-315
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Cost of Sparse Mesh Layouts Supporting Throughput Computing
(Abstract)
Martti Forsell
Ville Leppänen
Martti Penttonen
pp. 316-323
ABSTRACT
PDF
PURCHASE ARTICLE: $19
An Environment for (re)configuration and Execution Managenment of Flexible Radio Platforms
(Abstract)
Pierre-Henri Horrein
Christine Hennebert
Frédéric Pétrot
pp. 327-334
ABSTRACT
PDF
PURCHASE ARTICLE: $19
FBMC and GFDM Interference Cancellation Schemes for Flexible Digital Radio PHY Design
(Abstract)
Rohit Datta
Gerhard Fettweis
Zsolt Koll´r
Péter Horv´th
pp. 335-339
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Novel Architecture for Scalable, High Throughput, Multi-standard LDPC Decoder
(Abstract)
Muhammad Awais
Ashwani Singh
Emmanuel Boutillon
Guido Masera
pp. 340-347
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Non-Intrusive Online FPGA Test Scheme Using a Hardwired Network on Chip
(Abstract)
Muhammad Aqeel Wahlah
Kees Goossens
pp. 351-359
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Techniques for SAT-Based Constrained Test Pattern Generation
(Abstract)
Jirí Balc´rek
Petr Fišer
Jan Schmidt
pp. 360-366
ABSTRACT
PDF
PURCHASE ARTICLE: $19
On RTL Testability and Gate-Level Stuck-At-Fault Coverage Correlation for Scan Circuits
(Abstract)
Michal Rumplík
Josef Strnadel
pp. 367-374
ABSTRACT
PDF
PURCHASE ARTICLE: $19
An Enhanced Path Delay Fault Simulator for Combinational Circuits
(Abstract)
P. Manikandan
Bjørn B. Larsen
Einar J. Aas
pp. 375-381
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Dynamic Soft Error Hardening via Joint Body Biasing and Dynamic Voltage Scaling
(Abstract)
F. Firouzi
A. Yazdanbakhsh
H. Dorosti
S. M. Fakhraie
pp. 385-392
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Design of Fault Tolerant Network Interfaces for NoCs
(Abstract)
Leandro Fiorin
Laura Micconi
Mariagiovanna Sami
pp. 393-400
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Designing Robust Asynchronous Circuits Based on FinFET Technology
(Abstract)
Fataneh Jafari
Mahdi Mosaffa
Siamak Mohammadi
pp. 401-408
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Analyzing Area Penalty of 32-Bit Fault Tolerant ALU Using BCH Code
(Abstract)
Vahid Khorasani
Bijan Vosoughi Vahdat
Mohammad Mortazavi
pp. 409-413
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Low Power FPGA Implementations of JH and Fugue Hash Functions
(Abstract)
George Provelengios
Nikolaos S. Voros
Paris Kitsos
pp. 417-421
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Mutant Fault Injection in Functional Properties of a Model to Improve Coverage Metrics
(Abstract)
Ali Abbasinasab
Mehdi Mohammadi
Siamak Mohammadi
Svetlana Yanushkevich
Michael Smith
pp. 422-425
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Unified Architecture for BCD and Binary Adder/Subtractor
(Abstract)
V. Chetan Kumar
P. Sai Phaneendra
Syed Ershad Ahmed
Sreehari Veeramachaneni
N. Moorthy Muthukrishnan
M.B. Srinivas
pp. 426-429
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Synthesizing Concurrent Synchronous Computing Machines from Interrupt-Driven Binaries
(Abstract)
Michael D. Wilder
Robert E. Rinker
pp. 430-433
ABSTRACT
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PURCHASE ARTICLE: $19
Architectures for Fast Modular Multiplication
(Abstract)
Ahmet Aris
Berna Ors
Gokay Saldamli
pp. 434-437
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol
(Abstract)
Takieddine Majdoub
Sébastien Le Nours
Olivier Pasquier
Fabienne Nouvel
pp. 438-441
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Nexus: Hardware Support for Task-Based Programming
(Abstract)
Cor Meenderinck
Ben Juurlink
pp. 442-445
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Evaluation of Fault-Tolerant Routing Methods for NoC Architectures
(Abstract)
Mojtaba Valinataj
pp. 446-449
ABSTRACT
PDF
PURCHASE ARTICLE: $19
On the Design of Modulo 2^n+1 Multipliers
(Abstract)
Constantinos Efstathiou
Kiamal Pekmestzi
Nicholas Axelos
pp. 453-459
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Binary-to-RNS Conversion Units for moduli {2^n ± 3}
(Abstract)
Pedro Miguens Matutino
Ricardo Chaves
Leonel Sousa
pp. 460-467
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Modulo 2^n+1 Arithmetic Units with Embedded Diminished-to-Normal Conversion
(Abstract)
Evangelos Vassalos
Dimitris Bakalis
Haridimos T. Vergos
pp. 468-475
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Automated Design Debugging in a Testbench-Based Verification Environment
(Abstract)
Mehdi Dehbashi
André Sülflow
Görschwin Fey
pp. 479-486
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Efficient Fault Simulation of SystemC Designs
(Abstract)
Weiyun Lu
Martin Radetzki
pp. 487-494
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Higher-Order Abstraction in Hardware Descriptions with C?aSH
(Abstract)
Marco Gerards
Christiaan Baaij
Jan Kuper
Matthijs Kooijman
pp. 495-502
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Thermal Effect of TSVs in 3D Die-Stacked Integrated Circuits
(Abstract)
Hadrien A. Clarke
Kazuaki Murakami
pp. 503-508
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Parallel Ray Tracing Architecture Suitable for Application-Specific Hardware and GPGPU Implementations
(Abstract)
Alexandre S. Nery
Nadia Nedjah
Felipa M.G. França
Lech Jozwiak
pp. 511-518
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots
(Abstract)
Romain Prolonge
Fabien Clermidy
Leonel Tedesco
Fernando Moraes
pp. 519-524
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors
(Abstract)
Jaroslav Sykora
Leos Kafka
Martin Danek
Lukas Kohout
pp. 525-532
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Pre-silicon Characterization of NIST SHA-3 Final Round Candidates
(Abstract)
Xu Guo
Meeta Srivastav
Sinan Huang
Dinesh Ganta
Michael B. Henry
Leyla Nazhandali
Patrick Schaumont
pp. 535-542
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Novel Hardware Architecture for Implementing the Inner Loop of the SHA-2 Algorithms
(Abstract)
Ignacio Algredo-Badillo
Claudia Feregrino-Uribe
René Cumplido
Miguel Morales-Sandoval
pp. 543-549
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Modular Fault Injector for Multiple Fault Dependability and Security Evaluations
(Abstract)
Johannes Grinschgl
Armin Krieg
Christian Steger
Reinhold Weiss
Holger Bock
Josef Haid
pp. 550-557
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Breaking Hitag2 with Reconfigurable Hardware
(Abstract)
Petr Štembera
Martin Novotný
pp. 558-563
ABSTRACT
PDF
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Iteration-Based Trade-Off Analysis of Resource-Aware SDF
(Abstract)
Yang Yang
Marc Geilen
Twan Basten
Sander Stuijk
Henk Corporaal
pp. 567-574
ABSTRACT
PDF
PURCHASE ARTICLE: $19
SoC and Board Modeling for Processor-Centric Board Testing
(Abstract)
Anton Tsertov
Raimund Ubar
Artur Jutman
Sergei Devadze
pp. 575-582
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Hybrid Code-Data Prefetch-Aware Multiprocessor Task Graph Scheduling
(Abstract)
Morteza Damavandpeyma
Sander Stuijk
Twan Basten
Marc Geilen
Henk Corporaal
pp. 583-590
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Efficient CRT RSA with SCA Countermeasures
(Abstract)
Apostolos P. Fournaris
Odysseas Koufopavlou
pp. 593-599
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Control-Flow-Driven Source Level Timing Annotation for Embedded Software Models on Transaction Level
(Abstract)
Daniel Mueller-Gritschneder
Kun Lu
Ulf Schlichtmann
pp. 600-607
ABSTRACT
PDF
PURCHASE ARTICLE: $19
HDL-Mutation Based Simulation Data Generation by Propagation Guided Search
(Abstract)
Tao Xie
Wolfgang Mueller
Florian Letombe
pp. 608-615
ABSTRACT
PDF
PURCHASE ARTICLE: $19
On-chip Monitoring: A Light-Weight Interconnection Network Approach
(Abstract)
Pablo Ituero
Marisa López-Vallejo
Miguel Ángel S´nchez Marcos
Carlos Gómez Osuna
pp. 619-625
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Enhancing Performance Sustainability of Fault Tolerant Routing Algorithms in NoC-Based Architectures
(Abstract)
Khalid Latif
Amir-Mohammad Rahmani
Kameswar Rao Vaddina
Tiberiu Seceleanu
Pasi Liljeberg
Hannu Tenhunen
pp. 626-633
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Formal Modeling of Multicast Communication in 3D NoCs
(Abstract)
Maryam Kamali
Luigia Petre
Kaisa Sere
Masoud Daneshtalab
pp. 634-642
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Thermal Analysis of Job Allocation and Scheduling Schemes for 3D Stacked NoC's
(Abstract)
Kameswar Rao Vaddina
Amir-Mohammad Rahmani
Khalid Latif
Pasi Liljeberg
Juha Plosila
pp. 643-648
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs
(Abstract)
Xin Xin
Jens-Peter Kaps
Kris Gaj
pp. 651-657
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Unified Multiply/Accumulate Unit for Pairing-Based Cryptography over Prime, Binary and Ternary Fields
(Abstract)
Tobias Vejda
Johann Großschädl
Dan Page
pp. 658-666
ABSTRACT
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A Novel Architecture of Implementing Error Detecting AES Using PRNS
(Abstract)
Junfeng Chu
Mohammed Benaissa
pp. 667-673
ABSTRACT
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How a Symmetry Metric Assists Side-Channel Evaluation - A Novel Model Verification Method for Power Analysis
(Abstract)
Annelie Heuser
Michael Kasper
Werner Schindler
Marc Stöttinger
pp. 674-681
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Rapid and Accurate Leakage Power Estimation for Nano-CMOS Circuits
(Abstract)
Michal Bryk
Lech Józwiak
Wieslaw Kuzmicz
pp. 685-692
ABSTRACT
PDF
PURCHASE ARTICLE: $19
An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating
(Abstract)
Ittetsu Taniguchi
Mitsuya Uchida
Hiroyuki Tomiyama
Masahiro Fukui
Praveen Raghavan
Francky Catthoor
pp. 693-700
ABSTRACT
PDF
PURCHASE ARTICLE: $19
A Design Method for Programmable Two-Variable Discrete Function Generators Using Spline and Bilinear Interpolations
(Abstract)
Satoru Nakano
Yoichi Wakaba
Shinobu Nagayama
Shin'ichi Wakabayashi
pp. 701-707
ABSTRACT
PDF
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Exploiting Inter and Intra Application Dynamism to Save Energy
(Abstract)
Martijn Koedam
Sander Stuijk
Henk Corporaal
pp. 708-715
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Model Driven Cache-Aware Scheduling of Object Oriented Software for Chip Multiprocessors
(Abstract)
Tolga Ovatman
Feza Buzluca
pp. 719-726
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Compiling Esterel for Multi-core Execution
(Abstract)
Simon Yuan
Li Hsien Yoong
Partha S. Roop
pp. 727-735
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors
(Abstract)
Lina Sawalha
Sonya Wolff
Monte P. Tull
Ronald D. Barnes
pp. 736-745
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Energy Behaviour of NUCA Caches in CMPs
(Abstract)
Alessandro Bardine
Pierfrancesco Foglia
Francesco Panicucci
Marco Solinas
Julio Sahuquillo
pp. 746-753
ABSTRACT
PDF
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A Wearable Intelligent System for the Health of Expectant Mom's and of Their Children
(Abstract)
Giovanni Danese
Francesco Leporati
Alessandra Majani
Giulia Matrone
Enrico Merlino
pp. 757-763
ABSTRACT
PDF
PURCHASE ARTICLE: $19
Embedded System for Camera-Based TV Power Reduction
(Abstract)
Choong Geun Lee
Vasily G. Moshnyaga
Koji Hashimoto
pp. 764-768
ABSTRACT
PDF
PURCHASE ARTICLE: $19
An Embedded Video Sensor for a Smart Traffic Light
(Abstract)
Guido Matrella
Davide Marani
pp. 769-776
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On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks
(Abstract)
Alessandro Barenghi
Guido Bertoni
Fabrizio De Santis
Filippo Melzani
pp. 777-785
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Soft Error Detection Technique in Multi-threaded Architectures Using Control-Flow Monitoring
(Abstract)
Mohammad Maghsoudloo
Hamid R. Zarandi
Saadat Pour Mozafari
Navid Khoshavi
pp. 789-792
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Automatic Interface Generation for Component Reuse in HW-SW Partitioning
(Abstract)
Nicola Bombieri
Franco Fummi
Sara Vinco
Davide Quaglia
pp. 793-796
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A Scalable Distributed Asynchronous Control Network for High Level Synthesis of Digital Circuits
(Abstract)
Tom van Leeuwen
Rene van Leuken
pp. 797-800
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A Process-Variation-Adaptive Network-on-Chip with Variable-Cycle Routers
(Abstract)
Yohei Nakata
Yukihiro Takeuchi
Hiroshi Kawaguchi
Masahiko Yoshimoto
pp. 801-804
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Faster Processor Allocation Algorithms for Mesh-Connected CMPs
(Abstract)
Luka B. Daoud
M. El-Sayed Ragab
Victor Goulart
pp. 805-808
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Compatibility Study of Compile-Time Optimizations for Power and Reliability
(Abstract)
Ghazaleh Nazarian
Christos Strydis
Georgi Gaydadjiev
pp. 809-813
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An FPGA Implementation of the ZUC Stream Cipher
(Abstract)
Paris Kitsos
Nicolas Sklavos
Athanassios N. Skodras
pp. 814-817
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A Unified Execution Model for Data-Driven Applications on a Composable MPSoC
(Abstract)
Ashkan Beyranvand Nejad
Anca Molnos
Kees Goossens
pp. 818-822
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Author Index
(PDF)
pp. 823-827
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[Publishers information]
(PDF)
pp. 828
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