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Euromicro Symposium on Digital Systems Design (DSD'03)
HW/SW Codesign Incorporating Edge Delays Using Dynamic Programming
Belek-Antalya, Turkey
September 01-September 06
ISBN: 0-7695-2003-0
ASCII Text
x 
 
Karthikeyan Bhasyam, Kia Bazargan, "HW/SW Codesign Incorporating Edge Delays Using Dynamic Programming," 2012 15th Euromicro Conference on Digital System Design, pp. 264, Euromicro Symposium on Digital Systems Design (DSD'03), 2003.
 
 
BibTex
x
 
@article{ 10.1109/DSD.2003.1231945,
author = {Karthikeyan Bhasyam and Kia Bazargan},
title = {HW/SW Codesign Incorporating Edge Delays Using Dynamic Programming},
journal ={2012 15th Euromicro Conference on Digital System Design},
volume = {0},
year = {2003},
isbn = {0-7695-2003-0},
pages = {264},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2003.1231945},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - 2012 15th Euromicro Conference on Digital System Design
TI - HW/SW Codesign Incorporating Edge Delays Using Dynamic Programming
SN - 0-7695-2003-0
SP
EP
A1 - Karthikeyan Bhasyam,
A1 - Kia Bazargan,
PY - 2003
KW - null
VL - 0
JA - 2012 15th Euromicro Conference on Digital System Design
ER -
 
Karthikeyan Bhasyam, University of Minnesota
Kia Bazargan, University of Minnesota
We present an algorithm based on dynamic programming to perform the HW/SW partitioning and scheduling of a given task graph for minimum latency subject to resource constraint. The major contribution of this paper is to consider the edge communication delays in the dynamic programming solution of the problem. The algorithm has a polynomial run time complexity on trees. We also introduce a pruning technique to reduce the runtime of the worst-case scenario of directed acyclic graphs (DAGs). The algorithm has been implemented and the results are reported. A very fast quality heuristic is also proposed and implemented to provide good solutions in negligible run time.
Citation:
Karthikeyan Bhasyam, Kia Bazargan, "HW/SW Codesign Incorporating Edge Delays Using Dynamic Programming," dsd, pp.264, Euromicro Symposium on Digital Systems Design (DSD'03), 2003
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