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2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems
An Application-Level Dependability Analysis Framework for Embedded Systems
Vancouver, British Columbia Canada
October 03-October 05
ISBN: 978-0-7695-4556-1
ASCII Text
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Cristiana Bolchini, Antonio Miele, "An Application-Level Dependability Analysis Framework for Embedded Systems," 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), pp. 171-178, 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011.
 
 
BibTex
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@article{ 10.1109/DFT.2011.25,
author = {Cristiana Bolchini and Antonio Miele},
title = {An Application-Level Dependability Analysis Framework for Embedded Systems},
journal ={2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)},
volume = {0},
year = {2011},
issn = {1550-5774},
pages = {171-178},
doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2011.25},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
TI - An Application-Level Dependability Analysis Framework for Embedded Systems
SN - 1550-5774
SP171
EP178
A1 - Cristiana Bolchini,
A1 - Antonio Miele,
PY - 2011
KW - Fault injection
KW - Dependability analysis
KW - Microprocessors
VL - 0
JA - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
ER -
 
This paper presents a framework for an in-depth analysis of transient faults in microprocessor-based embedded systems. The framework is based on a debug-like mechanism supporting an interpretation and analysis of the system behavior from an application point of view, in terms of function execution flow and passed/returned parameters. The framework offers a highly-customizable fault/error debug and classification approach, based on such application-level information, aimed at supporting the designer in the evaluation and tuning of the system dependability-related properties. We present an implementation of the proposed framework within a state-of-the-art fault injection environment for SystemC transaction-level multiprocessor specifications, and we show that the approach can be ported also in other environments. An experimental session considering an embedded system based on a processor highlights the benefits of the proposed approach.
Index Terms:
Fault injection, Dependability analysis, Microprocessors
Citation:
Cristiana Bolchini, Antonio Miele, "An Application-Level Dependability Analysis Framework for Embedded Systems," dft, pp.171-178, 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
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