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21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06)
Arlington, Virginia, USA
October 04-October 06
ISBN: 0-7695-2706-X
Table of Contents
Introduction
Invited Talk
Single-Event-Upset Trends in Advanced CMOS Technologies
Session 1: Adaptive Design and Gate Level Redundancy
Ramyanshu Datta, The University of Texas at Austin, USA
Jacob A. Abraham, The University of Texas at Austin, USA
Abdulkadir Utku Diril, Nvidia Corporation
Abhijit Chatterjee, Georgia Institute of Technology, USA
Kevin Nowka, IBM Austin Research Laboratory, USA
pp. 3-11
Tian Xia, University of Vermont, USA
Stephen Wyatt, IBM Microelectronics Division, USA
Rupert Ho, IBM Microelectronics Division, USA
pp. 12-19
V. Beiu, United Arab Emirates University, United Arab Emirates
W. Ibrahim, United Arab Emirates University, United Arab Emirates
Y.A. Alkhawwar, United Arab Emirates University, United Arab Emirates
M.H. Sulieman, United Arab Emirates University, United Arab Emirates
pp. 29-40
Session 2: Delay Test
N. Devtaprasanna, University of Iowa, USA
A. Gunda, LSI Logic Corp., USA
P. Krishnamurthy, LSI Logic Corp., USA
S. M. Reddy, University of Iowa, USA
I. Pomeranz, Purdue University, USA
pp. 41-49
Kyriakos Christou, University of Cyprus, Cyprus
Maria K. Michael, University of Cyprus, Cyprus
Spyros Tragoudas, Southern Illinois University, USA
pp. 50-58
Hangkyu Lee, Purdue University, USA
Suriyaprakash Natarajan, Intel Corporation, USA
Srinivas Patil, Intel Corporation, USA
Irith Pomeranz, Purdue University, USA
pp. 59-70
Session 3: Emerging Technologies
X. Ma, Northeastern University, USA
J. Huang, Northeastern University, USA
C. Metra, University of Bologna, Italy
F. Lombardi, Northeastern University, USA
pp. 71-79
Minsu Choi, University of Missouri-Rolla, USA
Myungsu Choi, Oklahoma State University, USA
Zachary Patitz, Oklahoma State University, USA
Nohpill Park, Oklahoma State University, USA
pp. 80-88
Byunghyun Jang, Northeastern University, USA
Yong-Bin Kim, Northeastern University, USA
Fabrizio Lombardi, Northeastern University, USA
pp. 89-97
Reza M.P. Rad, University of Maryland Baltimore County, USA
Mohammad Tehranipoor, University of Maryland Baltimore County, USA
pp. 107-118
Session 4: Test Compression
Sverre Wichlund, Nordic Semiconductor, Norway
Frank Berntsen, Nordic Semiconductor, Norway
Einar J. Aas, Norwegian University of Science and Technology, Norway
pp. 119-127
Gang Zeng, Nagoya University, Japan
Youhua Shi, Waseda University, Japan
Toshinori Takabatake, Shonan Institute of Technology, Japan
Masao Yanagisawa, Waseda University, Japan
Hideo Ito, Chiba University, Japan
pp. 136-144
Geewhun Seok, University of Texas at Austin, USA
Il-Soo Lee, University of Texas at Austin, USA
Tony Ambler, University of Texas at Austin, USA
B. F. Womack, University of Texas at Austin, USA
pp. 145-156
Reconfiguration-Based Defect Tolerance for Microfluidic Biochips
Session 5: Defect Tolerance and Error Correction
Akhil Garg, STMicroelectronics India Pvt. Ltd., India
Prashant Dubey, STMicroelectronics India Pvt. Ltd., India
pp. 166-174
Hiroyuki Ohde, Tokyo Institute of Technology, Japan
Haruhiko Kaneko, Japan Aerospace Exploration Agency, Japan
Eiji Fujiwara, Tokyo Institute of Technology, Japan
pp. 175-183
Gong Rui, National University of Defense Technology, P.R. China
Chen Wei, National University of Defense Technology, P.R. China
Liu Fang, National University of Defense Technology, P.R. China
Dai Kui, National University of Defense Technology, P.R. China
Wang Zhiying, National University of Defense Technology, P.R. China
pp. 184-196
Session 6: BIST and Pseudo-Functional Test
Yuejian Wu, Nortel, Canada
Andre Ivanov, Univ. of British Columbia, Canada
pp. 197-205
Session 7: Reliability Evaluation and Analysis
S. Pontarelli, Universita di Roma "Tor Vergata", Italy
M. Ottavi, Northeastern University, USA
V. Vankamamidi, Northeastern University, USA
A. Salsano, Universita di Roma "Tor Vergata", Italy
F. Lombardi, Northeastern University, USA
pp. 227-235
Xingguo Xiong, University of Bridgeport, USA
Yu-Liang Wu, The Chinese University of Hong Kong, Hong Kong
Wen-Ben Jone, University of Cincinnati, USA
pp. 236-244
Andr? V. Fidalgo, Instituto Superior de Engenharia do Porto, Portugal
Gustavo R. Alves, Instituto Superior de Engenharia do Porto, Portugal
Jos? M. Ferreira, Faculdade de Engenharia da Universidade do Porto, Portugal
pp. 254-264
Session 8: Approaches for Soft Errors
M. Rebaudengo, Politecnico di Torino, Italy
L. Sterpone, Politecnico di Torino, Italy
M. Violante, Politecnico di Torino, Italy
C. Bolchini, Politecnico di Milano, Italy
A. Miele, Politecnico di Milano, Italy
D. Sciuto, Politecnico di Milano, Italy
pp. 265-273
Ilia Polian, Albert-Ludwigs-University, Germany
Bernd Becker, Albert-Ludwigs-University, Germany
Masato Nakasato, Nara Institute of Science and Technology, Japan
Satoshi Ohtake, Nara Institute of Science and Technology, Japan
Hideo Fujiwara2, Nara Institute of Science and Technology, Japan
pp. 274-279
C. A. L. Lisb?, Univ. Fed. do Rio Grande do Sul, Brazil
L. Carro, Univ. Fed. do Rio Grande do Sul, Brazil
M. Sonza Reorda, Politecnico di Torino, Italy
M. Violante, Politecnico di Torino, Italy
pp. 280-290
Session 9: Interactive Papers
Chuen-Song Chen, University of Rhode Island, USA
Jien-Chung Lo, University of Rhode Island, USA
Tian Xia, University of Vermont, USA
pp. 291-299
Ondrej Nov?, Czech Technical University in Prague, Czech Repub
Zdenek Pl?va, Technical University Liberec, Czech Republic
Jiri Jenicek, Technical University Liberec, Czech Republic
Zbynek Mader, Technical University Liberec, Czech Republic
Michal Jarkovsk?, Technical University Liberec, Czech Republic
pp. 300-308
Sandeep Dechu, Southern Illinois University Carbondale, USA
Manoj Kumar Goparaju, Southern Illinois University Carbondale, USA
Spyros Tragoudas, Southern Illinois University Carbondale, USA
pp. 318-326
Yoichi Sasaki, Chiba University, Japan
Kazuteru Namba, Chiba University, Japan
Hideo Ito, Chiba University, Japan
pp. 327-335
Yu-Jen Huang, National Central University, Taiwan
Da-Ming Chang, National Central University, Taiwan
Jin-Fu Li, National Central University, Taiwan
pp. 362-370
M. Ottavi, Northeastern University Boston, USA
S. Pontarelli, Universit? di Roma "Tor Vergata", Italy
A. Leandri, Universit? di Roma "Tor Vergata", Italy
A. Salsano, Universit? di Roma "Tor Vergata", Italy
pp. 371-379
Christian El Salloum, Vienna University of Technology, Austria
Andreas Steininger, Vienna University of Technology, Austria
Peter Tummeltshammer, Vienna University of Technology, Austria
Werner Harter, Robert Bosch GmbH, Germany
pp. 380-388
Yasser Sedaghat, Sharif University of Technology, Iran
Seyed Ghassem Miremadi, Sharif University of Technology, Iran
Mahdi Fazeli, Sharif University of Technology, Iran
pp. 389-400
Session 10: Diagnosis
Hiroshi Takahashi, Ehime University, Japan
Shuhei Kadoyama, Ehime University, Japan
Yoshinobu Higami, Ehime University, Japan
Yuzo Takamatsu, Ehime University, Japan
Koji Yamazaki, Meiji University, Japan
Takashi Aikyo, Semiconductor Technology Academic Research Center (STARC)
Yasuo Sato, Semiconductor Technology Academic Research Center (STARC)
pp. 401-109
Ying-Yen Chen, National Tsing Hua University, Taiwan
Jing-Jia Liou, National Tsing Hua University, Taiwan
pp. 428-438
Session 11: Defect and Fault Tolerance in Sensors and NOCs
Jozsef Dudas, Simon Fraser University, Canada
Cory Jung, Simon Fraser University, Canada
Linda Wu, Simon Fraser University, Canada
Glenn H. Chapman, Simon Fraser University, Canada
Israel Koren, University of Massachusetts, USA
Zahava Koren, University of Massachusetts, USA
pp. 439-447
Michelle L. La Haye, Simon Fraser University, Canada
Cory Jung, Simon Fraser University, Canada
David Chen, Simon Fraser University, Canada
Glenn H. Chapman, Simon Fraser University, Canada
Jozsef Dudas, Simon Fraser University, Canada
pp. 448-456
Cristian Grecu, University of British Columbia, Canada
Andr? Ivanov, University of British Columbia, Canada
Res Saleh, University of British Columbia, Canada
Partha Pratim Pande, Washington State University, USA
pp. 457-465
Partha Pratim Pande, Washington State University, USA
Amlan Ganguly, Washington State University, USA
Brett Feero, Washington State University, USA
Benjamin Belzer, Washington State University, USA
Cristian Grecu, University of British Columbia, Canada
pp. 466-476
Session 12: Test Techniques
Zhiyuan He, Link?ping University, Sweden
Zebo Peng, Link?ping University, Sweden
Petru Eles, Link?ping University, Sweden
Paul Rosinger, University of Southampton, UK
Bashir M. Al-Hashimi, University of Southampton, UK
pp. 477-485
Fengming Zhang, LTX Corporation, USA
Warren Necoechea, LTX Corporation, USA
Peter Reiter, LTX Corporation, USA
Yong-Bin Kim, Northeastern University, USA
Fabrizio Lombardi, Northeastern University, USA
pp. 486-494
Session 13: Processor Checking and Jitter
Federico Rota, University of Illinois-Chicago, USA
Shantanu Dutt, University of Illinois-Chicago, USA
Sahithi Krishna, University of Illinois-Chicago, USA
pp. 507-515
Joonhyuk Yoo, University of Maryland at College Park, USA
Manoj Franklin, University of Maryland at College Park, USA
pp. 516-524
Nandakumar P. Venugopal, University at Buffalo, The State University of New York, USA
Nihal Shastry, University at Buffalo, The State University of New York, USA
Shambhu J. Upadhyaya, University at Buffalo, The State University of New York, USA
pp. 525-534
Di Mu, University of Vermont, USA
Tian Xia, University of Vermont, USA
Hao Zheng, Univerisity of South Florida, USA
pp. 534-544
Session 14: Fault Tolerance Designs
Lushan Liu,, State University of New York at Buffalo, USA
Ramalingam Sridhar, State University of New York at Buffalo, USA
Shambhu Upadhyaya, State University of New York at Buffalo, USA
pp. 545-553
M. Ferringer, TU Vienna, Austria
G. Fuchs, TU Vienna, Austria
A. Steininger, TU Vienna, Austria
G. Kempf, Austrian Aerospace GmbH, Austria
pp. 563-571
Author Index
Author Index (PDF)
pp. 581-583
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