Synthesis of Efficient Linear Test Pattern Generators

Avijit Dutta; Nur A. Touba

doi:10.1109/DFT.2006.61

D
DFT
2006
21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06)
Abstract - Synthesis of Efficient Linear Test Pattern Generators

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21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06)

Synthesis of Efficient Linear Test Pattern Generators

Arlington, Virginia, USA

October 04-October 06

ISBN: 0-7695-2706-X

	ASCII Text	x
	Avijit Dutta, Nur A. Touba, "Synthesis of Efficient Linear Test Pattern Generators," 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), pp. 206-214, 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06), 2006.

	BibTex	x
	@article{ 10.1109/DFT.2006.61, author = {Avijit Dutta and Nur A. Touba}, title = {Synthesis of Efficient Linear Test Pattern Generators}, journal ={2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)}, volume = {0}, year = {2006}, issn = {1550-5774}, pages = {206-214}, doi = {http://doi.ieeecomputersociety.org/10.1109/DFT.2006.61}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) TI - Synthesis of Efficient Linear Test Pattern Generators SN - 1550-5774 SP206 EP214 A1 - Avijit Dutta, A1 - Nur A. Touba, PY - 2006 KW - null VL - 0 JA - 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) ER -

Avijit Dutta, University of Texas, USA

Nur A. Touba, University of Texas, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2006.61

This paper presents a procedure for Synthesis of LINear test pattern Generators called SLING. SLING can synthesize linear test pattern generators that satisfy constraints on area, speed, internal fanout, and randomness properties and outperform existing linear test pattern generator designs including linear feedback shift registers (LFSRs) and cellular automatons (CAs). SLING is a constraint-driven synthesis procedure that takes as input a set of constraints and then synthesizes a test pattern generator that satisfies those constraints. SLING uses a set of linear transformations that it applies iteratively to evolve a linear test pattern generator. Because of the way the transformations are chosen and constraints are set, a high degree of phase shift is maintained between every pair of linear sequences generated at different bit positions of the generator and cross and auto correlations are highly minimized. Hardware overhead in terms of XOR gates is also minimized. Comparative analysis and experimental results show the effectiveness of the proposed synthesis scheme.

Citation:

Avijit Dutta, Nur A. Touba, "Synthesis of Efficient Linear Test Pattern Generators," dft, pp.206-214, 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT'06), 2006

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