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20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'05)
Monterey, California
October 03-October 05
ISBN: 0-7695-2464-8
Table of Contents
Cover
Introduction
Yield Analysis and Modeling
Zhaojun Wo, University of Massachusetts
Israel Koren, University of Massachusetts
Maciej Ciesielski, University of Massachusetts
pp. 12-20
Xingguo Xiong, Chinese University of Hong Kong
Yu-Liang Wu, Chinese University of Hong Kong
Wen-Ben Jone, Chinese University of Hong Kong
pp. 21-32
Scan Design and Test Data Compression
Jinkyu Lee, University of Texas, Austin
Nur A. Touba, University of Texas, Austin
pp. 33-41
Samuel I. Ward, IBM Systems andTechnology Group
Chris Schattauer, University of Texas, Austin
Nur A. Touba, University of Texas, Austin
pp. 42-50
Jeremy Lee, University of Maryland Baltimore County
Mohammed Tehranipoor, University of Maryland Baltimore County
Chintan Patel, University of Maryland Baltimore County
Jim Plusquellic, University of Maryland Baltimore County
pp. 51-62
Reconfiguration
L. Breveglieri, Politecnico di Milano, Milano, ITALY
I. Koren, University of Massachusetts, Amherst
P. Maistri, Politecnico di Milano, Milano, ITALY
pp. 72-80
Chin-Lung Su, National Tsing Hua University
Yi-Ting Yeh, National Tsing Hua University
Cheng-Wen Wu, National Tsing Hua University
pp. 81-92
Error Correcting Codes and Circuits
G.C. Cardarilli, University of Rome
S. Pontarelli, University of Rome
M. Re, University of Rome
A. Salsano, University of Rome
pp. 111-119
Jien-Chung Lo, University of Rhode Island
Yu-Lun Wan, University of Rhode Island
Eiji Fujiwara, Tokyo Institute of Technology
pp. 120-130
Fault Detection and Tolerance for Sensor and Flash Memory
B. Saillet, IMT - Technop?le de Ch?teau Gombert
J.M. Portal, IMT - Technop?le de Ch?teau Gombert
D. N?, ST-Microelectronics ZI de Rousset BP 2
pp. 131-139
Cory Jung, Simon Fraser University,
Mohammad H. Izadi, Simon Fraser University
Michelle L. La Haye, Simon Fraser University
pp. 140-148
Glenn H. Chapman, Simon Fraser University
Israel Koren, University of Massachusetts, Amherst
Zahava Koren, University of Massachusetts, Amherst
Jozsef Dudas, Simon Fraser University
Cory Jung, Simon Fraser University
pp. 149-157
Glenn H. Chapman, Simon Fraser University
Vijay Jain, University of South Florida, Tampa
Shekhar Bhansal, University of South Florida, Tampa
pp. 158-168
Invited Talks
Error Tolerance, Let's Think Out of the Box
Error Tolerance in Razor Processor
Delay Fault Test and Timing Consideration
C. Metra, DEIS Univ. of Bologna
M. Oma?, DEIS Univ. of Bologna
D. Rossi, DEIS Univ. of Bologna
J. M. Cazeaux, DEIS Univ. of Bologna
TM Mak, DEIS Univ. of Bologna
pp. 169-177
Nisar Ahmed, ASIC Product Development Center, Texas Instruments India
Mohammad Tehranipoor, Univ. of Maryland Baltimore
pp. 187-198
Defect and Fault Tolerant Design in QCA Circuits
Mariam Momenzadeh, Northeastern University, Boston
Marco Ottavi, Northeastern University, Boston
Fabrizio Lombardi, Northeastern University, Boston
pp. 208-216
Zachary D. Patitz, Oklahoma State University
Nohpill Park, Oklahoma State University
Minsu Choi, University of Missouri-Rolla
Fred J. Meyer, Wichita State University, Kansas
pp. 217-228
Interconnect Test
Cristian Grecu, University of British Columbia
Partha Pande, University of British Columbia
Baosheng Wang, University of British Columbia
Andr? Ivanov, University of British Columbia
Res Saleh, University of British Columbia
pp. 238-246
Roberto Gomez, National Institute for Astrophysics, Optics and Electronics - INAOE
Alejandro Giron, National Institute for Astrophysics, Optics and Electronics - INAOE
Victor Champac, National Institute for Astrophysics, Optics and Electronics - INAOE
pp. 247-258
Case Studies and Applications
G.C. Cardarilli, University of Rome
S. Pontarelli, University of Rome
M. Re, University of Rome
A. Salsano, University of Rome
pp. 259-265
G. Cellere, Padova University
A. Paccagnella, Padova University
A. Visconti, STMicroelectronics Central R&D
M. Bonanomi, STMicroelectronics Central R&D
pp. 275-284
Kyung Ki Kim, Northeastern University, Boston
Jing Huang, Northeastern University, Boston
Yong-Bin Kim, Northeastern University, Boston
Fabrizio Lombardi, Northeastern University, Boston
pp. 285-293
Kyung Ki Kim, Northeastern University, Boston
Yong-Bin Kim, Northeastern University, Boston
Fabrizio Lombardi, Northeastern University, Boston
pp. 294-304
Interactive Session
Erik Schuler, Universidade Federal do Rio Grande do Sul
Luigi Carro, Universidade Federal do Rio Grande do Sul
pp. 314-324
D. P. Vasudevan, University of Arkansas, Fayetteville
P. K. Lala, University of Arkansas, Fayetteville
pp. 325-333
C. Bolchini, Politecnico di Milano
A. Miele, Politecnico di Milano
F. Salice, Politecnico di Milano
D. Sciuto, Politecnico di Milano
pp. 334-342
Daniele Rossi, DEIS, University of Bologna
Martin Oma?, DEIS, University of Bologna
Fabio Toma, DEIS, University of Bologna
Cecilia Metra, DEIS, University of Bologna
pp. 352-360
Fang Yu, Institute of Information Science, Academia Sinica
Chung-Hung Tsai, Institute of Information Science, Academia Sinica
Yao-Wen Huang, Institute of Information Science, Academia Sinica
D. T. Lee, Institute of Information Science, Academia Sinica
Hung-Yau Lin, National Taiwan University
Sy-Yen Kuo, National Taiwan University
pp. 361-370
J. Di, University of Arkansas
P.K. Lala, University of Arkansas
D. Vasudevan, University of Arkansas
pp. 371-379
Leonard Lee, ECE, UC-Santa Barbara
Sean Wu, ECE, UC-Santa Barbara
Charles H-P Wen, ECE, UC-Santa Barbara
Li-C. Wang, ECE, UC-Santa Barbara
pp. 415-426
Approaches for Soft Error
P. Bernardi, Politecnico di Torino
L. Bolzani, Politecnico di Torino
M. Rebaudengo, Politecnico di Torino
M. Sonza Reorda, Politecnico di Torino
M. Violante, Politecnico di Torino
pp. 445-453
On-line and Concurrent Fault Detection
Fault and Error Tolerant Systems
Hyukjune Chung, University of Southern California
Antonio Ortega, University of Southern California
pp. 514-522
Test Scheduling and Software-based Test
M. Hatzimihail, University of Piraeus, Greece
M. Psarakis, University of Piraeus, Greece
G. Xenoulis, University of Piraeus, Greece
D. Gizopoulos, University of Piraeus, Greece
A. Paschalis, University of Athens, Greece
pp. 535-543
Testing and Design for Analog Circuits
Shaolei Quan, Michigan State University, USA
Meng-Yao Liu, Natinal Central University, Taiwan
Chin-Long Wey, Natinal Central University, Taiwan
pp. 563-572
Michael Wieckowski, University of Rochester
John Liobe, University of Rochester
Quentin Diduck, University of Rochester
Martin Margala, University of Rochester
pp. 582-590
Author Index
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